Experiment result showed, the topology can make the device get to high Power Factor (PF), low Total Harmonic Distortion (THD) of input current, low ripple of output voltage, and high efficiency.
实验结果表明，应用该电路拓扑的实验装置，其功率因数较高，输入电流的总谐波畸变较低，输出电压纹波小，而且整个装置的效率也比较高。
In this paper, a scheduling algorithm is proposed for the multiprocessors based on dynamic voltage scaling algorithm and PF algorithm.
在研究单处理器动态电压缩放和多处理器的PF调度算法的基础上，提出了一种多处理器节能调度算法。
It can achieve a fixed output of DC voltage in the universal input range of ac 80 ~ 265 V. It owns the advantages of high efficiency, low total harmonic distortion, PF near to 1.
该方案能在80 ~ 265V宽输入电压范围内得到稳定直流电压输出，具有效率高、总谐波畸变率低、功率因数接近为1等特点。
It can achieve a fixed output of DC voltage in the universal input range of ac 80 ~ 265 V. It owns the advantages of high efficiency, low total harmonic distortion, PF near to 1.
该方案能在80 ~ 265V宽输入电压范围内得到稳定直流电压输出，具有效率高、总谐波畸变率低、功率因数接近为1等特点。
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