The address bus is used by the processor to select aspecific memory location or register within a particular peripheral.
地址总线被处理器用来选择在特定外设中的存储器地址或寄存器。
A table or diagram containing the name and address range of each peripheral addressable by the processor within the memory space.
一个在内存空间中的，包含每个外设的名字和可由处理器设置的地址范围的表格或图表。
The design of computers to permit expansion of their capabilities by increasing the central processor 's hardware and the number of peripheral devices as required.
计算机硬件系统的设计方法，必要时可增加中央处理机的硬件或外部设备来扩充机器的性能。
The paper explains the designing philosophy, the implementation method of systematic hardware platform, the peripheral circuit of the processor and the circuit of AV compressing module.
论文阐述了整个传输系统的硬件平台设计思想及实现方法，分别对处理器的外围电路及视、音频压缩编码模块电路进行了分析。
By means of it, some teaching experiments for hardwares such as monolithic processor systems and peripheral interface devices, and software programming experiments can be conveniently carried out.
通过与不同的接口电路板的连接，可构成多种应用系统，也可构成其它专业课程的智能控制单元。
Expansion port: Any socket on the out side of a computer through which an additional processor, extra memory or a peripheral can be connected.
扩展口：在电脑外面，用来接驳另一部处理机、额外存储器或外圈部件的任何插座。
This interface can be used to data exchange with peripheral apparatus for processor and controller which have not SPI interface function.
通过该方法的介绍，使得那些没有SPI接口功能的处理器和控制器能够扩展SPI接口，以便同外部设备进行数据交换。
Moreover, this paper selects low power digital signal processor of TMS320VC5410 and designs image processing circuit and peripheral circuit;
再次，运用了TMS320VC5410的低功耗数字信号处理器，设计了图像处理电路及其周边电路；
Peripheral Equipment - Devices connected to a computer processor, which perform such auxiliary functions as communications, data storage, printing, etc.
连接到处理计算机，用以实现通讯、数据存储、打印等辅助功能的设备。
The address bus is used by the processor to select a specific memory location or register within a particular peripheral.
地址总线被处理器用来选择在特定外设中的存储器地址或寄存器。
This could potentially wreak havoc on all future interactions between the processor and this peripheral.
这将会破坏处理器和处围设备的交互。
This allows efficient access to peripheral registers and flags located in SRAM memory without the need for a full Boolean processor.
这样就可以有效地对设备寄存器和位于SRAM中的某些标志位提供存取接口，而不再需要完整的布尔逻辑运算过程。
This allows efficient access to peripheral registers and flags located in SRAM memory without the need for a full Boolean processor.
这样就可以有效地对设备寄存器和位于SRAM中的某些标志位提供存取接口，而不再需要完整的布尔逻辑运算过程。
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