An architecture supporting parallel deployment and execution of network services was designed based on network processors and an IXP2400 processor prototype was developed.
设计了并行部署与处理网络服务的系统硬件体系结构，实现了基于IXP2400处理器的原型系统。
Compared with the full parallel architecture, the memory cost of the designed processor decreases, thus the speed is higher than that of the SDF pipeline architecture.
该处理器内存资源消耗较并行结构有所减少，运算速度较单独的SDF流水线结构有所提高。
Modular parallel multi-processor architecture is used in this scheme, and de-multiplex and re-multiplex of relatively complicated MPEG-2transport stream can be realized.
该方案采用模块化并行多处理器结构，可实现较为复杂的MPEG-2传输流解复用、再复用的过程。
Chapter 3 presents the interior architecture of SHARC processor and the parallel system consisted of multi-processor.
第三章介绍了SHARC处理器的内部结构，以及由多片处理器组成的并行处理系统。
Chapter 3 presents the interior architecture of SHARC processor and the parallel system consisted of multi-processor.
第三章介绍了SHARC处理器的内部结构，以及由多片处理器组成的并行处理系统。
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