The algorithm is easy to program in parallel processor and suitable for real-time processing.
该算法运算量小，编程容易，适合实时处理。
It improves the speed and decreases the processing delay of real time SAR imaging on a parallel processor.
在并行多处理器上利用此算法，降低了SAR实时成像的运算量和成像延迟，显著提高了SAR实时成像的处理速度。
It's very important you don't consciously analyze or you will interfere with the more powerful parallel processor below.
有一点很重要，你不能有意识地分析它，否则就会干预接下来这个强大的处理过程。
The router arithmetic of the parallel processor is complex. The circuit has long latency and the logic has the huge size.
并行处理器互连网络的路由算法异常复杂，电路延迟长，逻辑规模巨大，是制约高性能并行处理器提高频率、降低功耗的瓶颈。
The communication cost between the processing nodes in parallel processor is the performance bottleneck of the processor.
在并行处理系统中，处理节点之间的通信开销是制约处理机性能提高的主要瓶颈。
Next, work your way up to processor and disk benchmarks, then two-node (parallel) benchmarks, then multi-node (parallel) benchmarks.
接下来，做处理器和磁盘基准测试，然后是两节点（并行）基准测试，再执行多节点（并行）基准测试。
This provides a mechanism for developers to decompose problems into tasks that can then be executed in parallel across arbitrary Numbers of processor cores.
它为开发者提供了一种机制，可以将问题拆解为多个任务，在任意数量的处理器核心上并行执行。
A real time optical logic processor is presented, that can perform binary logic operations in parallel. Experimental result is given of the system as a half adder.
本文提出了一种能实时完成二进制逻辑运算的光学并行处理系统，并给出了作为半加法器的实验结果。
The query processor could not start the necessary thread resources for parallel query execution.
查询处理器未能为并行查询的执行启动必要的线程资源。
Qiapter 2 described the characteristic and performance of the high speed digital signal processor, analyzed and researched three kinds of parallel processing system structure based on DSP.
第2章论述了高速数字信号处理器的特点和性能，对基于DSP的三种并行处理体系结构进行了分析研究。
Trimming of the edges of sheet strip to make them parallel. This done at either the stainless steel mill or at the stainless steel processor.
对薄板的边缘进行修边以使两边平行。此工艺可在不锈钢工厂或不锈钢加工者处完成。
Further more, parallel instructions and SIMD instructions are provided to give the processor strong capability of media processing.
此外还提供了并行指令和SIMD指令，使得处理器具有强大的媒体处理能力。
In the embedded system, along with the application of multi-core processor, the system software such as Real Time Operation system (RTOS) and parallel compilers are becoming a research hotspot.
在嵌入式系统中，随着多核处理器的应用，相应的系统软件，如实时操作系统、并行编译器等也日益成为研究的热点。
An architecture supporting parallel deployment and execution of network services was designed based on network processors and an IXP2400 processor prototype was developed.
设计了并行部署与处理网络服务的系统硬件体系结构，实现了基于IXP2400处理器的原型系统。
Compared with the full parallel architecture, the memory cost of the designed processor decreases, thus the speed is higher than that of the SDF pipeline architecture.
该处理器内存资源消耗较并行结构有所减少，运算速度较单独的SDF流水线结构有所提高。
The implementation of the parallel algorithm is discussed and results are given to show the performance of the parallel system compared to a single processor system.
文中还将多处理器并行系统与单个处理器系统的处理结果进行了对比分析，验证了并行算法的优越性。
This paper shows two programming models of Multi-Microengine parallel processing in Network Processor and presents a better way of assigning packet-processing tasks among microengines.
对网络处理器中多微引擎并行处理的两种编程模型进行分析，讨论了如何将数据包处理任务在多个微引擎之间进行分配，从而取得较高处理性能的一般性策略问题。
Base on the neighborhood parallel theory, this system was adopted by parallel processing structure with multi processor, and combined parallel inputting, parallel processing, parallel storing.
系统基于邻域并行的原理，采用多处理单元并行的处理结构，集图像并行输入、并行处理、并行存储于一体。
This paper designs and implements an engine system of packet classification applying the parallel classifying algorithm, in which network processor is the hardware core.
本文以网络处理器为硬件核心，结合提出的并行包分类算法，设计和实现了一个包分类引擎系统。
Then based on the digital signal processor DM642 of TI company, the paper introduces its own digital port. The video port is a bidirectional, high-speed and parallel processing port.
其次以TI公司DM642数字信号处理器为基础，介绍了其特有的数字视频口，该视频口是一种双向，高速的并行处理接口。
Processing 150 threads in parallel is rather much for one processor, which will spend a lot of time just switching between these threads.
并行处理150个线程对于一个处理器来说负担很大，大部分时间都消耗在线程切换上。
TMS320C80 is a digital signal processor of MIMD structure, which provides a solid foundation for real-time parallel signal processing.
TMS320C80是一种MIMD结构的数字信号处理芯片，为实时并行信号处理提供了强有力的保证。
The Holy Grail of computer design is an approach called parallel processing, which delivers all the benefits of a single fast processor by engaging many inexpensive ones at the same time.
计算机设计中人们梦寐以求的目标是平行处理法，在这种方法中通过同时使用许多便宜的微处理器，来实现单个的快速的微处理器的所有好处。
The parallel processing of location of image implements area lossless segmentationin space domain of image. Each node of the processor deals with a substructure.
图像定位的并行处理，是在图像空域上进行区域无损分割，各个处理机节点分别处理一个子区域。
The main idea of this paper is to introduce a technique that can parallel monitor several sending sets at the same time under the pattern of single processor.
本文主要介绍在中国教育第三频道山东教育台发射机实时监控系统中采用的，一种在单处理器模式下可同时并行地监控多个受控设备的技术方法。
To adopt the parallel CRC arithmetic further improved the compute speed of GFP processor.
采用了并行CRC算法，进一步地提高了GF P处理器的处理速度。
In order to take full advantage of multi-core processor resources, the parallel programming model by building blocks with multithreading was studied, hence improving the performance of the program.
为了充分利用多核处理器资源，研究了多线程构建模块并行编程模式，从而提高程序的性能。
This design is implemented in the FT64 stream processor. By using it, multiple FT64 processors can transfer data through a high-performance network and perform parallel stream computing.
该设计应用于FT64流处理器上，使得多个流处理器能够通过高性能网络进行数据传输，以便进行并行流数据运算。
This design is implemented in the FT64 stream processor. By using it, multiple FT64 processors can transfer data through a high-performance network and perform parallel stream computing.
该设计应用于FT64流处理器上，使得多个流处理器能够通过高性能网络进行数据传输，以便进行并行流数据运算。
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