The final code block then reformats the assignment lines, by iterating through the original buffer line Numbers (linenum) and through each line in the lines list, in parallel.
最后的代码块同时遍历原来的缓存行号(linenum)和行列表中的每个行，以重新格式化赋值行。
The compilation of the query on the remote server and fetching of enough data to fill the ATQ buffer on all legs of the UNION will proceed in parallel.
查询在远程服务器上的编译，以及取足够的数据来填充union所有分支上的AT Q缓冲区，这两个过程是并行进行的。
If you are driving long cables, or are driving several DACs (parallel DAC for example), it is good practice to buffer the data signal.
如果你用长电缆，或驱动(例如并行DAC)几个数模转换器，对于缓冲区中的数据信号它是很好的做法。
In addition, the buffer layer can mitigate parallel conduction issues between transistor devices and the silicon substrate.
此外，缓冲层可以减少晶体管之间的设备和硅衬底平行的传导问题。
It contains a high speed 16-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and both serial and parallel system interface ports.
它内置一个16位高速采样adc、一个内部转换时钟、一个内部基准电压源(和缓冲)、纠错电路，以及串行和并行系统接口端口。
Idler roller can be divided into groove, parallel to the roller, spherical roller, buffer roller, roller screw, corrosion-resistant roller, vertical roller block;
托辊可分为槽形托辊、平行托辊、调心托辊、缓冲托辊、螺旋托辊、耐腐蚀托辊、立挡辊等；
The part contains a high-speed 18-bit samplingADC, an internal conversion clock, an internal reference buffer, error correction circuits, and both serial and parallel system interface ports.
该器件内置一个高速18位采样ADC、一个内部转换时钟、一个内部基准电压缓冲、纠错电路，以及串行和并行系统接口。
The part contains a high-speed 18-bit samplingADC, an internal conversion clock, an internal reference buffer, error correction circuits, and both serial and parallel system interface ports.
该器件内置一个高速18位采样ADC、一个内部转换时钟、一个内部基准电压缓冲、纠错电路，以及串行和并行系统接口。
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