The main points in experiments of pipeline-parallel ADC are introduced.
还介绍了流水并行式ADC的电路设计和具体实现的要点。
A column parallel RSD cyclic ADC for CMOS image sensor is designed.
设计了一种用于CMOS图像传感器的列并行rsd循环adc。
Based on all the study above, a real column parallel single-slope ADC circuit is designed.
在列并行模数转换器理论的研究基础上着手实际电路的设计。
It contains a high speed 16-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and both serial and parallel system interface ports.
它内置一个16位高速采样adc、一个内部转换时钟、一个内部基准电压源(和缓冲)、纠错电路，以及串行和并行系统接口端口。
To stress the application of Karaugh map on designing of coding circuits in parallel-comparator ADC in terms of the design of combinational logic circuits.
根据组合逻辑电路的设计方法，突出用卡诺图化简逻辑表达式在并联比较型A/D转换器编码电路设计中的应用。
To stress the application of Karaugh map on designing of coding circuits in parallel-comparator ADC in terms of the design of combinational logic circuits.
根据组合逻辑电路的设计方法，突出用卡诺图化简逻辑表达式在并联比较型A/D转换器编码电路设计中的应用。
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