Output jitter is defined in three ways: period jitter. duty-cycle jitter, and phase jitter.
输出时钟抖动定义为三种类型：周期抖动，占空比抖动和相位抖动。
A feedback scheduling approach was presented to adjust control tasks deadlines online thus to reduce output jitter.
提出一种反馈调度的方法在线调节控制任务的截止时限，从而减少输出抖动。
As the voltage VCTR varies, VCO 104 varies the frequency of the VCO output signal, causing phase offsets and increased output jitter when PLL 100 is in lock mode, as shown by dotted line 202.
随着电压VCTR改变，VCO 104改变VCO输出信号的频率，使得当pll 100处于锁定模式时引起脉冲偏移和增大的输出抖动，如图中虚线202所示。
In order to minimize the PLL jitter, it is recommended to avoid active signal on the TEST output.
为了尽量减少抖动的锁相环，建议，以避免在测试输出的积极信号。
Jitter is a random variation of the output clock.
时钟抖动是输出时钟的随机变化。
The phase jitter of output signal of the PLL( phase locked loop) frequency doubler is analyzed.
定量分析了数字式锁相倍频器输出信号的相位抖动。
Pixel clock output frequencies range from 10mhz to 140mhz with sampling clock jitter of 250ps peak to peak.
像素时钟输出频率范围从10mhz到140mhz的采样250ps的峰峰值抖动。
The experiments show that with large pulse width and high repetition rate of pump pulse, the dependent jitter scope of output laser pulse with pump pulse is increased.
结果表明在抽运时抽运脉宽和重复率较大的情况下，输出激光脉冲相对于抽运脉冲抖动范围明显加大。
The experiments show that with large pulse width and high repetition rate of pump pulse, the dependent jitter scope of output laser pulse with pump pulse is increased.
结果表明在抽运时抽运脉宽和重复率较大的情况下，输出激光脉冲相对于抽运脉冲抖动范围明显加大。
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