In tests, they modeled a DNA version of an XOR logic gate that generates an output when one of two inputs is present, but not when both or neither is present.
在试验中，他们构建了一个DNA版本的“异或”逻辑门，当两个输入端中有一个有输入时，产生输出；但当两个输入端都有或都没有输入时，就不会产生输出。
When the threshold voltage is negative and a read is attempted by applying 0 V to the control gate, the memory element will turn on to indicate logic one is being stored.
当阈值电压为负且通过向控制栅极施加0V来尝试读取时，存储器元件将接通以指示正在存储逻辑1。
When the threshold voltage is negative and a read is attempted by applying 0 V to the control gate, the memory element will turn on to indicate logic one is being stored.
当阈值电压为负且通过向控制栅极施加0V来尝试读取时，存储器元件将接通以指示正在存储逻辑1。
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