The low power on-chip buses encoding technique is resultful for reducing the power consumption of DSP buses, so it is meaning for DSP low power design.
同时总线编码技术对于降低DSP总线功耗有明显的效果，所以这一技术对DSP低功耗设计有重要的意义。
The design of SOC usually adopts hierarchical on-chip-bus architecture, different IPs are integrated on different types of buses.
SOC设计通常采用层次化片上总线体系结构，不同的IP集成在不同类型的总线上。
In the SOC design, the hierarchical on-chip-bus architecture is usually adopted, and different IPs are integrated on different types of buses.
SOC设计通常采用层次化片上总线的体系结构，不同的IP集成在不同类型的总线上。
In the meantime, the module takes advantage of on-chip cache to reduce the pressure on the system buses.
同时，该设计还使用片上缓存方式，降低了系统总线的占用率。
In the meantime, the module takes advantage of on-chip cache to reduce the pressure on the system buses.
同时，该设计还使用片上缓存方式，降低了系统总线的占用率。
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