FPGA functional test platform is composed of configuration circuit, a power circuit and I/O interface circuit.
FPGA功能测试平台由配置电路、电源电路和I/O接口电路构成。
On the core of 80C196KC, the single-chip-computer is extended for program store, data store, I/O interface circuit and analog signals amplifier etc.
下位机以80C196KC为核心，外扩程序存储器、数据存储器、I/O接口电路和模拟信号放大器等电路。
The I/O interface circuit, as an information exchanging device, coordinates the work between the computer and the simulator. Each out equipment gains access to the computer through interface circuit.
接口是仿真系统中计算机和模拟船舶电站发电装置之间信息交换的部件，它使两者之间能很好地协同工作，每一个外设都要通过接口电路才能和主机相连。
The interface uses a circuit based on dual port FIFO buffer memory to realize data transfer of different I/O velocity between the two computers.
该接口采用双端口FIFO缓冲存储技术，实现两机间不同I／O速度的数据通信。
The circuit is simple and convenient for operation, it not only develops system I/O interface, but also realizes mailbox function.
该电路结构简单、操作方便，既可满足系统I／O扩展，又能兼顾邮箱功能实现。
The circuit is simple and convenient for operation, it not only develops system I/O interface, but also realizes mailbox function.
该电路结构简单、操作方便，既可满足系统I／O扩展，又能兼顾邮箱功能实现。
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