The digit signal processor embodies the center arithmetic logic unit, Multiplier unit, Shifter unit, Sequencing unit, Auxiliary register unit, interception unit.
数字信号处理器包含了中央算术逻辑单元、乘法器单元、移位器单元、排序器单元、辅助寄存器单元、中断单元的设计。
It is given that the detailed design of the integer execution unit, include ALU, multiplier, barrel shifter and register files.
重点讨论了其中的整数执行部件的设计，包括ALU、乘法器、桶式移位器、寄存器堆等重要执行部件。
The money multiplier is the increase in the supply of money resulting from the increase of a unit of high powered money.
货币乘数是以单位高能货币的增加爱导致的货币供给的增加。
With this multiplier adder unit, we can implement FIR filters with any orders.
采用该乘加单元我们可以实现任何阶数高速FIR滤波器。
This paper presents a new high speed FIR Filter structure which includes a unique multiplier adder unit.
本文提出了一种新型的高速滤波器结构，此结构的核心是一种独特的乘加单元。
Finally, an example is presented to illustrate the Lagrange multiplier statistics for unit root tests.
最后，一个实例分析简要说明了这几个统计量在单位根检验中的应用。
Finally, an example is presented to illustrate the Lagrange multiplier statistics for unit root tests.
最后，一个实例分析简要说明了这几个统计量在单位根检验中的应用。
应用推荐