In this paper, the high decimation ratio of digital down converter is studied and the multi-stage decimation algorithm is especially analyzed based on CIC filter, CFIR filter and RRC filter.
研究了高倍抽取的数字下变频设计,重点分析了基于级联积分梳状滤波器、级联补偿滤波器、级联根升余弦滤波器的多级抽样频率算法。
A new parallel FIR filter based on the iterated short-convolution algorithms (ISCA) is designed with the structure of multi-stage small size parallel sub FIR filters.
在并行fir的快速迭代短卷积算法(ISCA)基础上,采用多级小尺寸并行fir结构级联结构,实现了一种新型并行FIR滤波器。
Ultimately, selection of the optimum filters depends on flow rate, particle removal efficiency of the filter, filtration scheme (single vs. multi-stage filtration), and filter service life.
归根结底,最佳过滤器的选择决定了流速、过滤器的粒子去除效率、过滤方案(单步与多步过滤)和过滤器的使用寿命。
Ultimately, selection of the optimum filters depends on flow rate, particle removal efficiency of the filter, filtration scheme (single vs. multi-stage filtration), and filter service life.
归根结底,最佳过滤器的选择决定了流速、过滤器的粒子去除效率、过滤方案(单步与多步过滤)和过滤器的使用寿命。
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