An error ratio testing system featured with low cost, multi-speed grades, multi-interface and a SOPC based on a single field programmable gate array (FPGA) chip were presented.
利用单片现场可编程门阵列(FPGA)可构成一个SOPC，实现了低成本、多速率、多接口的误码测试系统。
This paper gives a necessary introduction to the base operation of the multi-valued logic algebra system and fundamental gate circuit for realizing these base operation.
本文对于多值逻辑代数系统中的基本运算和实现这些基本运算的门电路，作了必要的阐述。
This paper gives a necessary introduction to the base operation of the multi-valued logic algebra system and fundamental gate circuit for realizing these base operation.
本文对于多值逻辑代数系统中的基本运算和实现这些基本运算的门电路，作了必要的阐述。
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