A memory controller on the chip.
芯片上集成内存控制器。
On-chip L3 directory and memory controller.
芯片上L 3目录和内存控制器。
The memory controller is coupled with a dynamic random access memory.
所述存储器控制器耦接一动态随机存取存储器。
An embodiment of the invention discloses a method, memory controller and memory system for accessing PCIE RAM.
本发明实施例公开了一种访问PCIE RAM的方法、存储控制器和存储系统。
Parameter table module is the SDRAM memory controller interface for reading parameter information when image processing.
参数表模块主要实现SDRAM存储器的控制器接口，用于图像处理时读取参数信息。
The image sensor has an integrated memory controller for controlling transfers of data between the sensor and the memory array.
所述图像传感器具有用于控制所述传感器与存储器阵列之间的数据转移的集成式存储器控制器。
A memory controller and methods for performing memory block initialization and copy functions with reduced bus traffic are disclosed.
本发明揭示用于在总线业务减少的情况下执行存储器块初始化及复制功能的存储器控制器及方法。
The memory controller can perform the memory initialization by receiving a start address of a memory, an end address of the memory and a fill value.
所述存储器控制器可通过接收存储器的开始地址、所述存储器的结束地址及填充值来执行所述存储器初始化。
Embodiments of the invention provide a method and apparatus for accessing a non-volatile memory controller and a volatile memory via a Shared interface.
本发明的实施例提供了一种用于通过共用接口访问非易失性存储器控制器和易失性存储器的方法和设备。
The method also includes issuing commands to the selected one of the non-volatile memory controller and the volatile memory via the Shared control signals.
该方法还包括通过共用控制信号发出指令到选定的非易失性存储器控制器和易失性存储器中的一个。
In this embodiment, system memory controller 402 is integrated on the central processor 400 to provide access to system memory 404 through interconnect 406.
在这个实施例中，系统存储控制器402集成到中央处理器400上，以便提供通过互连406对系统存储器404的访问。
In one embodiment, graphics local memory controller is also integrated on chipset 408 to provide access to graphics local memory 416 through interconnect 418.
在一个实施例中，图形本地存储控制器也集成到芯片组408上，以便提供通过互连418对图形本地存储器416的访问。
In another embodiment, the graphics processor and graphics local memory controller are both located on the same integrated chip as the central processor (not shown).
在另一个实施例中，图形处理器和图形本地存储控制器均与中央处理器设置在相同的集成芯片上(未示出)。
System memory controller 106, integrated on chipset 102 in one embodiment, provides central processor 100 access to the system memory subsystem 108 through interconnect 110.
在一个实施例中，集成到芯片组102上的系统存储控制器106对中央处理器100提供通过互连110对系统存储器子系统108的访问。
System memory controller 106, integrated on chipset 102 in one embodiment, provides central processor 100 access to the system memory subsystem 108 through interconnect 110.
在一个实施例中，集成到芯片组102上的系统存储控制器106对中央处理器100提供通过互连110对系统存储器子系统108的访问。
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