A passive loop filter scheme and the design method of the filter for current charge pump PLL frequency synthesizer chip are given in the paper.
针对电流型电荷泵PLL频率综合器芯片，提出一种称为极值相位裕量的无源环路滤波器方案和设计方法。
A passive loop filter scheme and the design method of the filter for current charge pump PLL frequency synthesizer chip are given in the paper.
针对电流型电荷泵PLL频率综合器芯片，提出一种称为极值相位裕量的无源环路滤波器方案和设计方法。
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