In logic verification and logic synthesis, Boolean matching is widely used to testify whether two given functions are logically equal by means of OBDD.
在逻辑验证和综合中，布尔匹配利用有序二叉判定图obdd来检验两个给定的逻辑函数是否相等。
The WSDL model USES one such extension hook, a post-set method, to run the verification logic.
WSDL模型会使用一个这样的扩展元素，即一个后设方法，来运行这个验证逻辑。
The best countermeasure approach would be to enhance the interface between the signature verification function and the business logic.
最好的对策办法就是增强签名验证功能和业务逻辑之间的接口。
This section will conclude by implementing the signature verification logic in the SecureXMLMessage class.
本节完成了在SecureXMLMessage类中实现签名验证逻辑。
To show some practical examples, it is necessary to build some logic around this verification point. This logic is arranged in different sections, which are
要介绍一些实际的实例，就有必要在此验证点周围建立某种逻辑。
Digital ASIC front-end design and verification methods is used in digital logic part design.
数字逻辑部分的设计采用数字asic的前端设计及验证方法。
Static verification offers the promise of finding many common errors in program logic such as possibly improper use of a method at compile time as opposed to at runtime.
状态检验(Static verification)可以查找多种通常的程序逻辑错误，如不恰当的使用一个在编译时而不是运行时的方法。
The LOP circuit module is described in gate level with VHDL, which has passed the logic simulation and verification. It is applied to the design of floating-point adder.
LOP电路设计采用VHDL语言门级描述，已通过逻辑仿真验证，并在浮点加法器的设计中得到应用。
After the study on the problems of formal specification and verification for network protocols, this paper gives out a general model system based on the temporal logic.
本文通过对网络协议形式化描述和验证问题的研究，针对网络协议的特性，给出了一种基于时态逻辑的模型系统。
Finally, through the attempt and research on verification logic in the field of information security, we point that formal logic method is sure playing a main role in it.
最后想指出的是，我们通过对验证逻辑在信息安全方面的一些尝试和研究，说明了形式化逻辑方法确实可以在这个领域上发挥重要作用。
It is proved that this type of counter has correct logic function according to EDA simulation and experimental verification with FPGA and can be normally used in the design of digital system.
经eda软件模拟仿真和FPGA硬件验证，表明该计数器具有正确的逻辑功能，能够正常地应用于数字系统的设计。
Verification is complex in logic and unfeasible in practice, while falsification is simple in logic but the same difficulty in practice.
证实在逻辑上复杂、在实践中不可行，证伪虽在逻辑上简单、但在实践中同样困难。
A model verification algorithm based on DTMA and the subset of DTMA modal logic is devised, and the decidability of the model verification is proved.
对于DTMA与DTMA模态逻辑的子集给出了一个模型验证的算法，证明了验证算法的可判定性。
The robot has used the fuzzy logic control algorithm to static obstacle avoidance, and through experimental verification this algorithm feasibility.
对机器人静态避障采用了基于模糊逻辑的控制算法，并通过实验验证了该算法的可行性。
Verification and logic synthesis result show that the DDC chip can meet the requirement, also have stable performance.
验证和逻辑综合结果表明DDC芯片能满足设计要求，性能稳定。
In terms of the authors sketch of design and verification of safety programs, a pointer logic system is designed for a subset of C-like language.
文中根据作者所设想的安全程序的设计和证明框架，为类c语言的一个子集设计了一个指针逻辑系统。
The verification of throughness of workflow logic is very expensive both in time and space. The state ex- plosion is the main difficulty.
工作流的畅通性验证无论在时间上还是空间上代价都是非常高的，状态空间爆炸是验证的主要困难所在。
The scientific methodology of the economics should be dialectical union of induction and deduction, verification and falsification, logic and history, positivism and norm.
经济学方法的出路应该是归纳和演绎，证实和证伪，逻辑与历史，实证与规范的辩证统一。
The logic design of FPGA could meet the demand of imaging and data transmission through simulation and verification. The imaging system will establish reliable foundation for the future application.
通过仿真验证fpga逻辑满足成像及数据传输要求，为后续应用奠定了基础。
We abstract this as a group of logic rules, which makes it possible to do the verification of the interleaving of infinite sessions of the security protocol.
将安全协议对应的并发合成系统抽象为一组逻辑规则，能够对安全协议无穷会话的交叠运行进行验证。
We abstract this as a group of logic rules, which makes it possible to do the verification of the interleaving of infinite sessions of the security protocol.
将安全协议对应的并发合成系统抽象为一组逻辑规则，能够对安全协议无穷会话的交叠运行进行验证。
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