It is often necessary to map one business object into another when coordinating between heterogeneous systems, or even as part of normal business logic.
在协调异构系统时，甚至在正常业务逻辑的某个部分，常常需要将一个业务对象映射到另一个业务对象。
In this model, we map our visual (graph) model to our business logic (domain model).
在此模型中，我们将可视化(图形)模型映射到业务逻辑(域模型)中。
The service code implements the WSDL interface and applies business and mapping logic to call into and map results from backend systems.
服务代码实现WSDL接口并将业务与映射逻辑应用于调用和映射来自后端系统的结果。
Therefore, the business logic just consists of an interface map, which maps the outbound interface to the inbound interface.
因此，业务逻辑只包含接口映射，即将出站接口映射到入站接口。
You'll also develop the data synchronization logic using an interface map component, and use the enterprise discovery wizard to create the EIS export and EIS import.
您还可以使用接口映射组件开发数据同步逻辑，并使用企业发现向导创建EIS导出和EIS导入。
GMF allows you to effectively map (see Figure 5) your semantic (business logic) model to a notional (graphical) model.
GMF将使您可以把语义(商业逻辑)模型高效映射到概念(图形)模型(参见图5)。
It is often necessary to map one business object (see Key landmarks — business objects) into another when coordinating heterogeneous systems, or even as part of normal business logic.
在协调异构系统时，甚至在正常业务逻辑的某个部分，常常需要将一个业务对象(请参见重要的里程碑——业务对象)映射成另一个业务对象。
The BPEL process was modified to add the business logic for the Map variable.
对该BPEL流程进行修改以添加用于map变量的业务逻辑。
To map the possible flow logic at the operation level, create the following wiring.
要在操作级别映射可能的流逻辑，请创建以下连接。
You can code conditional WebSphere TX map logic within map rules using the PRESENT function, which tests to see if a particular data object is found in a data structure.
可以在映射规则中使用present函数编写有条件的WebSphereTX映射逻辑，这个函数检查在数据结构中是否可以找到某个数据对象。
Using the map, you can keep that reference (and, more importantly, the business logic that USES it) and wire it to the PersonnelSystem using the mediation.
使用该图，可以保留这项引用(更重要的是，保留它所使用的业务逻辑)，并且通过中介将它连接到PersonnelSystem。
From this simple visual design you can easily map the business logic straight into database tables.
从这个简单的可视设计中，可以容易地把业务逻辑直接映射到数据库表。
Once you map an ASBO to a GBO, the GBO passes to a collaboration that contains the routing workflows and business logic for the transaction.
一旦您将ASBO映射到GBO, GBO就会传送到一个包含事务的路由工作流和业务逻辑的协作。
The session facade provides adapter logic to map Hibernate entity POJOs to Service Data Objects and back.
会话Facade提供适配器逻辑，以便将Hibernate实体POJO映射到服务数据对象，以及进行反向映射。
We separate the physical view and logic view of IR, and make algorithms work on the high-level logic view, and map the high-level algorithms into low-level IR through view transformations.
分离对象的物理视图与逻辑视图，隐藏物理视图的实现细节，使算法工作在高层的逻辑视图上，并通过视图变换将高层算法映射到低层中间表示上。
The Reduced-Dimension Map can be used as a means to simplify the multiple variable logical function and to design logic circuit.
降维图可作为化简多变量逻辑函数、设计逻辑电路的一种方法。
Logic, elements, memory map, etc. Document for "the other person", even if that person is YOU.
逻辑，元素，内存映射文件，等“其他人”，即使那个人是你。
To give an example explains control theory of synthesis automatization reform, casing map of logic and using effect of reform.
举例说明了综合自动化改造的控制原理，逻辑框图及改造后的使用效果。
Through making concept map, students can construct their knowledge, command the inner logic and thus systematize the knowledge.
学生通过制作概念图，可以建构知识的整体框架，把握知识的内在逻辑，形成体系。
Based on it, a graphic method simplifying the OR-Coincidence (OC) expansions of a logic function under fixed polarity by using K-map is presented.
在此基础上提出了基于K图的逻辑函数oc展开式在固定极性下化简的新方法。
According to different methods of simplifying logic function, this thesis discussed the method of simplifying Karnaugh map by using computer.
讨论了逻辑函数卡诺图化简的计算机实现，提出了基于最大覆盖的问题求解方法。
To stress the application of Karaugh map on designing of coding circuits in parallel-comparator ADC in terms of the design of combinational logic circuits.
根据组合逻辑电路的设计方法，突出用卡诺图化简逻辑表达式在并联比较型A/D转换器编码电路设计中的应用。
I'd stopped by the police station looking for a map—there was no apparent logic to Padang's streets, and I was tired of aimlessly walking in search of a hotel.
我顺路到警察局看看能不能找到一张当地地图，因为巴东市的街道排列实在没有任何规律可循，而且我也不想漫无目的地在街上暴走、找酒店。
The design is concise and reliable. The sketch map of the logic circuit and the explanation of the main parts are presented.
电路设计简洁可靠，并给出了主要的逻辑电路示意图与主要部件说明；
VersaTiles can flexibly map the logic and sequential gates of a design.
通才可以灵活地地图的逻辑和设计顺序大门。
A study on the multi-solution of simplifying logic function with Karnaugh map;
线要素化简一直是自动制图综合中的重要研究内容。
A study on the multi-solution of simplifying logic function with Karnaugh map;
线要素化简一直是自动制图综合中的重要研究内容。
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