Three encoder circuit are designed respectively with feed shift-registers and logic gates: SRAA-based serial QC-LDPC encoder;
采用反馈移位寄存器与逻辑门设计了三个典型的编码器电路：基于SRAA电路的串行准循环LDPC码编码器；
An encoder architecture of low density parity check (LDPC) code defined in DVB-S2 standard is proposed.
针对DVB - S2标准中的低密度奇偶校验(LDPC)码，提出了一种LDPC编码器设计结构。
An encoder architecture of low density parity check (LDPC) code defined in DVB-S2 standard is proposed.
针对DVB - S2标准中的低密度奇偶校验(LDPC)码，提出了一种LDPC编码器设计结构。
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