If it is MAGIC_NUMBER, get the data/interrupt register values from the structure passed and generate the interrupt as per the structure values.
如果该值是 MAGIC_NUMBER，就从所传递的结构中获取数据/中断寄存器的值，并按照这个结构的值来产生中断。
If there is any change in the status register, it means an interrupt has occurred.
如果状态寄存器发生了变化，就意味着已经触发了一个中断。
Since you have already set the (simulated) register values appropriately, the ISR will process normally as if it was a real interrupt.
由于已经正确设置了(模拟)寄存器的值，IS r会正常进行处理，就仿佛它是一个真正的中断。
Register the sequence number, interrupt nature, and thread attributes to the main program.
向主程序注册序号、中断属性和线程属性。
If a D-cache miss (the processor fails to find data in the D-cache) occurs, an interrupt is raised so that the corresponding register can record this event by increasing its value.
如果发生D -cache失效(处理器无法在D - cache中找到数据)，那么发出一个中断，让相应的寄存器可以通过增加它的值记录这一事件。
On top of these register #define macros, you should also define another macro that dictates whether the ISR will run in simulation mode or in the original interrupt context. For example
在这些寄存器的 #define宏前面，还应该定义另外一个宏，它用来说明 ISR 是在模拟模式中运行还是在原来的中断上下文中运行的。
Interludes of spoken Sufi poetry interrupt the music, typically beginning at a low register and gradually ascending to a climax before calming back down to the beginning tone.
包括苏菲(Sufi)诗中的音乐间隔，从低音域开始逐步攀升至高音，然后降到初始调。
The dsirr (Data Storage Interrupt reason Register) indicates the type of page fault that has occurred.
dsirr（数据存储中断原因寄存器）表示发生的页面错误的类型。
Unable to register interrupt handler.
无法注册中断句柄程序。
The dsisr (Data Storage Interrupt Status Register) indicates why the page fault could not be resolved.
dsisr(数据存储中断状态寄存器)表示页面错误无法解决的原因。
When an interrupt fires, you have to read GICC_IAR register.
当中断火灾，一定要仔细阅读GICC _ IAR寄存器。
This condition is signaled via the Status register and the Data Overrun Interrupt (if enabled).
这种情况是通过状态寄存器和数据溢出中断（如果使用）来体现。
This function initializes a hardware interrupt with the kernel. This initialization enables the device driver to register an event and enable the interrupt.
该函数初始化硬件中断和内核，使设备驱动注册事件并使能中断。
The Powerdown mode saves the register contents but freezes the Oscillator, disabling all other chips until the next interrupt or hardware reset.
掉电模式时晶体振荡器停 止振荡，所有功能除了中断和硬件复位之外都停止工作，寄存器的内容则一直保持；
A design method based on multiplexing execution-cycle and interrupt flag signals using register model is proposed. S.
提出了中断执行周州复川、寄存器模型设计中断标识信号的中断电路实现方法。
This has undesired effects on some GIC registers, for eg GICC_IAR register can only read once to acknowledge the interrupt.
这不希望一些GIC寄存器效果，如GICC_IAR寄存器只能读一次承认中断。
An interrupt handler reads the register and provides messages indicating which memory bank caused the parity error.
中断处理器读寄存器，并提供信息，指出哪一个存储单元出现了奇偶错误。
The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next Interrupt or Hard- ware Reset.
掉电模式时晶体振荡器停止振荡，所有功能除了中断和硬件复位之外都停止工作；
The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next Interrupt or Hard- ware Reset.
掉电模式时晶体振荡器停止振荡，所有功能除了中断和硬件复位之外都停止工作；
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