Each CUDA-capable GPU node includes local DDR3 SDRAM as well as a 16-lane PCI Express? gen2 interface to the system backplane, providing maximum data throughput direct to GPU memory.
每个CUDAGPU节点包括本地的DDR3SDRAM以及一个16通道PCI二代系统的背板接口，直接向GPU内存提供最大的数据流量。
This virtual interface would consist of the expected interface, including a virtual address space representing the device (such as shadow PCI) and virtual interrupt.
这个虚拟接口包含预期的接口，包括表示设备(如shadowPCI)的虚拟地址空间和虚拟中断。
There are some special interface chips of PCI in market.
市场上有一些专用PCI接口芯片。
This paper is based on developing the PCI communication card of MSCIS interface system and Device Driver of the communication card.
论文是在研制MSCIS接口系统的PCI通信卡和开发通信卡设备驱动程序的基础上完成的。
The method which integrates PCI bus interface and control logic into a FPGA chip improves the integration density and transplantation of system.
该方法将PCI总线接口和控制逻辑集成于一片FPGA中，提高了系统的集成度和可移植性。
Thebase of data and control channel is the PCI interface, which is achieved by the PCIcore.
PCI接口是数据通道和控制通道的基础，它是以集成PCI 核来实现的。
Studies issues in the finite state machine (FSM) design in PCI bus interface controllers.
研究有限状态机与PCI总线接口控制器的设计问题。
By designing and compiling interface application driving program, the interrupt and query schemes of data transmission based on PCI bus are realized.
并通过设计和编写接口应用驱动程序，实现了基于PCI总线方式下数据传输的中断和查询两种方案。
It USES the PCI interface chip SAA7146A special for media processing produced by Philips, and connects simply with video encoder, video decoder, audio encoder and decoder.
设计选用PCI多媒体接口芯片SAA7146A，方便的实现了与视频编码器、视频解码器和音频编解码器的连接。
The FSM model of target PCI bus interface controller is then provided based on PCI bus operation timing.
根据PCI总线操作时序，提出了从设备接口控制器的有限状态机模型。
In the paper has been described that crucial technologies have PCI interface, automatic gain control, CPLD implementing of digital logic and so on.
系统使用并在本文中介绍的关键技术还有PCI接口技术、自动增益控制技术、数字逻辑的CPLD实现技术等。
System software designs: embracing the PCI driver, initialization the interface chip and the software of DSP.
系统软件设计：包括PCI驱动的开发，接口芯片的初始化设计；dsp的软件设计。
PCI interface driver, IO port directly read, interrupt control and so on.
PCI接口驱动程序，IO口的直接读取，中断控制等等。
The data encrypt card using DSP chip, PCI interface chip, asynchronism FIFO chip and EPLD that realize the control of the data encrypt card is designed and implemented.
数据加解密卡的硬件设计和实现。采用DSP芯片、PCI接口芯片、异步FIFO等器件，通过EPLD控制实现了数据加解密卡；
This scheme includes three parts: PCI Bus interface board, experiment flat board and device driver high-level software.
该设计方案由PCI总线接口板、实验平台板、设备驱动程序及上层软件三个部分组成。
Communication with computer directly though the interface of PCI.
通过PCI接口与计算机直接通讯。
This PCI interface circuit is feasible and can be efficient and lower cost, it is worthy of being popularized.
该PCI接口电路是切实可行的，具有高效、低成本等优点，可以很方便地移植到用户系统中。
The paper proposes a password circuit that by using computer ISA and PCI bus and printer interface.
本文介绍了利用计算机ISA、PCI总线和打印机接口设计密码电路。
Introduce the PCI-AHB interface and PCI local bus operation, especially analyse the architecture of PCI-AHB bridge module.
对PCI -AHB接口和PCI总线操作进行了介绍，详细分析了PCI—AHB桥接模块的结构设计。
Many specifications are involved with PCI bus and interface explanation is complicated, so its difficult to develop the stable PCI bus equipment of high performance.
PCI总线涉及的规范比较多，接口说明复杂，开发出高效、稳定的PCI总线设备具有一定难度。
PCI is an ideal interface for high-speed communication between DSP application system and general computer.
PCI是DSP应用系统与通用计算机高速通信的理想接口。
PLX9054 is a general PCI controller, it has the property of high performance and friendly interface.
PLX9054是通用的PC I控制器，具有性能高，接口方便灵活的特点。
This paper summarizes some major techniques that occur in the designing and realizing of the interface for PCI fast Ethernet adapter.
总结PCI快速以太网适配器设计实现中总线界面的关键性技术问题。
This scheme includes three parts: PCI Bus interface board, experimental platform device driver and high-level software.
该设计方案由PCI总线接口板、实验平台板、设备驱动程序及上层应用软件三个部分组成。
This paper briefly introduced the feature of PCI protocol slave mode interface chip PCI9052 and illustrated the advertent items when configuring the EEPROM.
本文简要介绍了PCI协议从模式接口芯片pci9052特点，并说明了EEPROM配置注意事项。
PCI bus is used to accomplish the computer interface in HPTIMI.
高分辨率时间间隔测量仪采用PCI总线与计算机接口。
Introduces how to connect the DSP to PCI Bus in brief and choose the means of using special PCI Bus interface chip to achieve it.
介绍DSP芯片如何桥接到PCI总线，并选择利用专用接口芯片的方法来实现。
Through PCI interface and dual port SRAM, host accessed data from the card.
数据采集卡采用PC I局部总线接口，通过双端口ram进行数据传输。
The design of the PCI bus in the interspaced ordonnance, and the realization of the sequence state machine in the PCI interface controller is given.
给出了PCI总线配置空间的设计以及PCI接口控制器中时序状态机的实现。
The data acquisition system includes analog input, A/D conversion, data buffering, DMA transferring and PCI interface.
采集系统包括模拟输入、A/D变换、数据缓存、数据DMA传输及PCI总线接口等电路。
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