Thus, the study of interconnection delay becomes more important for current circuit design and technology.
因此研究互连延时成为当今进行电路设计和工艺的重点。
Interconnection delay in MCM 's is modeled by using three different techniques, and the associated formulas are also derived.
分别采用三种不同的技术对多芯片组件互连延迟进行建模，并给出了相应的解。
Based on the two-pole approximation, low-order moments are used to analyze the delay characteristic of interconnection.
延时与冲激响应有着密切的联系，本文采用系统冲激响应的低阶矩，基于双极点近似对互连的延时特性进行了研究。
Finally, a new test scheme to detect the crosstalk fault, based on the path delay inertia, for interconnection lines in SoC is proposed.
最后，我们提出一个利用路径延迟惯性原理，来测试系统电路连线之串音障碍的新测试方法。
Finally, a new test scheme to detect the crosstalk fault, based on the path delay inertia, for interconnection lines in SoC is proposed.
最后，我们提出一个利用路径延迟惯性原理，来测试系统电路连线之串音障碍的新测试方法。
应用推荐