Its successor was the 4040 processor (released in 1974), which had an expanded instruction set, program memory, register set, and stack.
其后面是4040处理器(1974发布)，其具有扩展指令集、程序内存、寄存器集和堆栈。
If you don't have a compiler that can produce code to take advantage of the underlying processor architecture and instruction set, then the fastest machines will be useless.
如果您没有可以生成代码来利用底层处理器架构和指令集的编译器，那么最快的机器也将是无用的。
In addition to processor clock speed, another important processor performance metric is clock cycles per instruction (CPI).
除了处理器时钟速度外，另一个重要的处理器性能度量是每条指令的时钟周期(CPI)。
Instruction generation can also be tailored to the underlying processor to take full advantage of the underlying platform.
JIT编译器会根据处理器生成指令并充分利用所处的平台。
This is just to point out why instruction format matters on the PowerPC processor -- you need to know how much space you have to work with!
这只是为了说明为什么指令格式在PowerPC处理器上是如此重要 ——您需要知道自己到底需要使用多少空间！
I bet a lot of people continued to write machine language until the processor, like a bartender eager to close up and go home, finally kicked them out by switching to a RISC instruction set.
我打赌，很多人会一直用机器语言写下去，直到有一天，处理器换成了RISC指令集-就像急着下班的酒吧服务员急着关门一样，端掉这些人的饭碗。
Thus, whenever instruction addresses are presented to the processor (as in Branch instructions), the low-order two bits are ignored.
因此，只要将指令地址提供给处理器(如Branch指令)，就会忽略低阶的两位。
A simple example is when a 1.0 processor executes a 2.0 stylesheet template and encounters an XSL: document instruction.
一个简单的例子就是1.0处理程序执行2.0样式表模板或者遇到xsl：document指令。
A program references storage using the effective address computed by the processor when it executes a storage Access or Branch instruction or when it fetches the next sequential instruction.
在程序执行StorageAccess或Branch指令或者在存取下一条顺序指令时，它将使用处理器计算出的有效地址引用存储设备。
A similar example is runtime code scanning used by full virtualization solutions to find and redirect privileged instructions (to work around issues in certain processor instruction sets).
类似的一个例子是完全虚拟化解决方案通过运行时代码扫描来查找和重定向特权指令(用来解决特定处理器指令集的一些问题)。
Stall -- A clock cycle where the processor does not begin a new instruction.
暂停（Stall） ——处理器不开始执行新指令处的时钟周期。
hbr hint_trigger, $register -- This tells the processor that the branch instruction at the relative address hint_trigger is likely to branch to the address specified in register $register.
hbr hint_trigger, $register ——告诉处理器相对地址 hint_trigger 处的分支指令可能会跳转到寄存器 $register 所指定的地址。
Equivalent instructions are available on other platforms-for example, the Motorola MC68030 processor has an instruction named compare and swap (CAS) that has similar semantics.
在其他平台上有等效的指令，例如Motorola MC 68030处理器的compareandswap (CAS)指令有相似的语义。
If an XSL: function element has an XSL: fallback instruction, then an XSLT 1.0 processor ignores the XSL: function element entirely and does not execute its XSL: fallback.
如果xsl：function元素具有xsl：fallback指令，则XSLT 1.0处理程序将完全忽略x sl： function元素，不执行其xsl： fallback。
Each instruction on the PowerPC is exactly 32 bits long, with the instruction's opcode (the code telling the processor which instruction it is) taking the first six bits.
PowerPC上的每条指令都正好是32位长，指令的opcode(操作符，告诉处理器这条指令是什么的代码)占据了前6位。
The other main type of processor architecture, CISC (the x86 processor being a popular CISC instruction set), allows for memory access in nearly every instruction.
另外一种主要的处理器体系结构CISC (x86处理器就是一种流行的CISC指令集)几乎允许在每条指令中进行内存访问。
Branch mis-prediction (Processor guesses the wrong branch, so it has to flush the pipeline and load instruction from proper branch again), or.
分支预测错误(处理器猜错了分支，所以它不得不更新流水线并从正确的分支装载指令)。
I-cache miss (Processor cannot get the next instruction from instruction cache).
I -cache失效(处理器无法从指令缓存获取下一个指令)。
For years, processor makers consistently delivered increases in clock rates and instruction-level parallelism, so that single-threaded code executed faster on newer processors with no modification.
多年来，处理器制造厂商在不断提高时钟速度和指令级并行性，因此单线程代码不需要修改就可在新的处理器上更快运行。
Similarly, whenever the processor develops an instruction address, the low-order two bits are zero.
同样，只要处理器利用指令地址，低阶的两位就为零。
When an instruction is executed by a 2.0 processor in BC mode, its result might not be identical to the result produced by a 1.0 processor.
如果执行由 2.0处理程序在BC模式下执行，结果可能和 1.0 处理程序生成的结果不完全一样。
The Loongson processor is based on the MIPS instruction set, the basic commands that a microprocessor understands.
龙芯基于MIPS指令集，属于精简的指令集。
In a computer, a functional unit that interprets and executes instructions. Note: a processor consists of at least an instruction control unit and an arithmetic and logic unit.
计算机中，解释并执行指令的一种功能单元。注：处理器至少包含有一个指令控制器和一个算术与逻辑运算器。
By knowing instruction retired per cycle, the system knows how fast the current application is executing inside the processor.
通过知晓每循环的指令重试，系统就知晓了处理器内部正在执行的当前应用程序有多快。
The exception is the XSL: sort instruction, where the lang attribute tells the processor that it should sort strings in a manner consistent with the cultural conventions of the specified language.
这个例外就是xsl：sort指令，它的lang属性告诉处理程序应该按照和指定语言的文化传统一致的方式排序字符串。
In this case, the context listing is generated so that you can clearly see the effect of each instruction being executed by the processor.
此例中生成了context清单，以便您能清楚看到处理器执行每条指令的结果。
Programs are stored on permanent media (such as a hard disk), and loaded into RAM to be executed by the computer's processor, which executes each instruction in the program, one at a time.
程序储存于永久性介质（如硬盘）并加载随机存取内存而由计算机处理器执行，一次只执行程序内的一个指令。
The address from which the first instruction will be fetched after the processor is powered on or reset.
一个处理器上电或重启后第一个指令能被从之取出来的地址。
A register in the processor that contains the address of the next instruction to be executed. Also known as a program counter.
包含下一条要执行指令地址的处理器中的寄存器。也叫程序计数器。
A register in the processor that contains the address of the next instruction to be executed. Also known as a program counter.
包含下一条要执行指令地址的处理器中的寄存器。也叫程序计数器。
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