This paper presents a new high speed FIR Filter structure which includes a unique multiplier adder unit.
本文提出了一种新型的高速滤波器结构，此结构的核心是一种独特的乘加单元。
Through the structure and logical designing, we get a high-speed and effective LOD circuit, which applied in floating-point adder.
我们从LOD的组成结构和逻辑两个方面进行设计，实现了一种快速、高效的LOD电路。
Binary Addition and Subtraction, Implementation and Performance of the Full Adder, High-speed Addition, Signed Arithmetic.
二进制加减法，全加器实现及其性能，高速加法，带符号算术运算。
High-Speed Floating-point Adder is a critical part in the coprocessor, which is attached to the computing basis of floating-point instructions.
浮点加法器是协处理器的核心运算部件，是实现浮点指令各种运算的基础，其设计优化是提高浮点运算速度和精度的关键途径。
High-speed digit-serial adder and its application.
高速数字串行加法器及其应用。
High-speed digit-serial adder and its application.
高速数字串行加法器及其应用。
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