Data acquisition, data processing, and USB communication can be realized by using CPLD, high speed ADC, DSP and USB chip.
利用高速可编程逻辑芯片CPLD，高速adc,DSP芯片和USB芯片实现数据采集，数据预处理和usb通信。
At present, the wideband digital receiver has the "bottleneck" question that the high speed ADC can not match low speed DSP processing ability.
目前的宽带数字接收机又存在着高速adc与后端低速率DSP处理能力之间矛盾的“瓶颈”问题。
Aiming at the mixed-signal circuit testing, an integrated built-in self test (BIST) architecture for testing on-chip high speed ADC was presented.
针对混合信号电路的测试问题，提出了一种内建自测试(BIST)结构，分析并给出了如何利用该结构来计算片上高速模数转换器(adc)的静态参数。
VHS-ADC, a high-speed signal processing system based on FPGA, has been applied widely in communication, audio, video and radar signal processing fields.
ADC是一种基于FPGA的高速数字信号处理平台，在通信、音视频、雷达信号处理等领域得到了成功的应用。
The system utilizes CPLD to realize logical and timing control between DSP and multi-channel ADC. The interface between DSP's HPI and PCI bus is employed to achieve high-speed data transmission.
该系统采用CPLD实现了DSP与多通道adc的逻辑和时序控制，通过DSP的HPI与PCI总线接口设计实现了采集数据的高速传输。
A novel encoding scheme with high speed and low power is proposed for folding and interpolating ADC.
提出了一种新的适用于折叠插值型adc的高速低功耗的编码器。
A high speed data acquisition system with wide dynamic range by using serial ADC circuit is introduced in detail.
详细介绍了一种采用串行adc线路的大动态范围高速数据采集系统。
It contains a low power, high speed, 16-bit sampling ADC with no missing codes, an internal conversion clock, and a versatile serial interface port.
它内置一个低功耗、高速、16位不失码的采样adc、一个内部转换时钟和一个多功能串行接口。
Software radio which promises well needs a kind of wideband high speed and resolution ADC, but at present it is hard to realize.
应用前景广阔的软件无线电需要一种宽带高速高分辨率的ADC，然而目前这种ADC难于实现。
In this paper, a method of designing a vibration simulator based on FPGA, ADC and high-speed DAC is discussed. Hardware block diagram and main FPGA design for this simulator are introduced.
介绍了一种基于FPGA、ADC和高速DAC的振动模拟器的设计方法，并给出了该模拟器的硬件原理框图和FPGA设计的核心模块。
It contains a high speed 16-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and both serial and parallel system interface ports.
它内置一个16位高速采样adc、一个内部转换时钟、一个内部基准电压源(和缓冲)、纠错电路，以及串行和并行系统接口端口。
VHS-ADC, a high-speed signal processing system based on FPGA, has been applied widely in communication, audio, video and radar signal processing fields.
VHS-ADC是一种基于FPGA的高速数字信号处理平台，在通信、音视频、雷达信号处理等领域得到了成功的应用。
It contains a low power, high speed, 18-bit sampling ADC and a versatile serial interface port.
它内置一个低功耗、高速、18位采样adc和一个多功能串行接口端口。
Furthermore, taking phase error of RF front-end, sampling error of high-speed ADC and the size of array into consideration, the image quality of synthetic aperture DSMR is still poor.
受射频前端相位误差、ADC采样误差及阵元个数有限的影响，综合孔径直接采样微波辐射计成像质量仍然较低。
Due to the attribute of high-speed transmission of PCI, a PCI-bus-based data acquisition board with multiple ADC&DAC Channels can meet the requirement of data transmission under high-speed conversion.
利用PCI总线的高速传输特性，设计基于PCI总线的多路A/D、D/A转换信号采集卡，可以满足高速转换下的数据传输要求。
Due to the attribute of high-speed transmission of PCI, a PCI-bus-based data acquisition board with multiple ADC&DAC Channels can meet the requirement of data transmission under high-speed conversion.
利用PCI总线的高速传输特性，设计基于PCI总线的多路A/D、D/A转换信号采集卡，可以满足高速转换下的数据传输要求。
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