In order to meet with the requirements of high-speed, the source coupled FET logic (SCFL) is applied in all of the circuits.
为了适应高速度的要求，所有电路全都采用源极耦合场效应管逻辑来实现。
The descriptions of adjective logic types disagree in high-order logic, contacting presupposition, we try to unify the logic description of adjectives.
高阶类论语言中形容词的逻辑类型描写不一致，本文从汉语似矛盾句实例出发，联系预设因素，尝试统一形容词的逻辑类型描写。
For complicate logic in the feedback file parse, anatomize and draw the corresponding flow chat in order to develop the system with high efficiency.
对于反馈报文解析中复杂的逻辑，仔细分析，画出对应的流程图，便于系统高效率开发。
Furthermore, in order to avoid clock skew familiar in high-speed sequential logic circuits, negative clock skew system is used in clock routeway and buffers are placed in clock-tree.
此外，为了避免高速时序电路中常见的时钟偏差，时钟通道采用负时钟偏差系统，并在时钟树中放置了缓冲器。
In order to avoid clock skew familiar in high-speed sequential logic circuits, buffers are placed in clock-tree.
为了避免高速时序电路中常见的时钟偏差，在时钟树中放置了缓冲器。
In order to avoid clock skew familiar in high-speed sequential logic circuits, buffers are placed in clock-tree.
为了避免高速时序电路中常见的时钟偏差，在时钟树中放置了缓冲器。
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