Also, this paper details the complex and high-speed logic control and timing schedule design.
对于系统中复杂且高速的逻辑控制及时序设计及其实现的阐述是论文的另一重要部分。
FPGA is used to achieve the complex and high-speed logic control and the design of time sequence, with grabbed digital video signal cut and stored in SRAM, under the principles of the video signal.
利用FPGA完成复杂且高速的逻辑控制及时序设计，将采集的图像根据视频信号原理进行裁剪并存储在SRAM中。
Hermetically sealed, very high speed, logic gate optocoupler.
密封，非常高的速度，逻辑门光耦合器。
OPS still is placed in to study the stage because of lacking of the high-speed optical logic device and optical buffer.
光分组交换由于缺乏高速光逻辑器件、光缓冲存储器等，因此还处于研究阶段。
Arcing: The RFI (radio frequency interference) generated by high voltage switching may disrupt high speed logic circuits.
电弧：高压切换产生的RFI(射频干扰)可能会干扰高速逻辑电路。
In addition, the RFI (radio frequency interference) generated may disrupt high speed logic circuits in the system.
此外，由此产生的射频干扰(RFI)可能会中断系统中的高速逻辑电路。
This paper introduces the design and realization of a high-speed and low-cost virtual logic analyzer based on FPGA and USB2.0 bus.
本文介绍了一种基于FPGA的USB2.0高速、低成本的虚拟逻辑分析仪的设计原理与实现方法。
No CPU is needed for the fuzzy controller circuit. All algorithms are realized for high speed by digital logic circuits.
该模糊控制器电路不用cpu，全部算法由数字逻辑电路实现，具有运算速度快的特点，适合于需要高速控制的场合。
A general introduction was made on effect, control principle and PLC logic control of the loop control system in high speed rod rolling.
概述活套控制系统在高速线材轧制中的作用、控制原理、PLC逻辑控制及活套调节对精轧机和夹送辊、吐丝机之间张力的影响。
The feature of rapidly develop, high speed and high reliability of Complex Program Logic Device(CPLD) makes CPLD playing a more and more role in the design of digital system.
大规模可编程逻辑阵列（CPLD）的快速开发、在系统编程以及高速可靠的特点使得CPLD在数字系统的构建中起到越来越重要的作用。
The part of data acquisition in the control system is introduced mainly, which USES high-speed data acquisition chip AD7862 and CPLD (complex programmable logic device) to make the system extended.
数据采集部分采用AD 7862芯片，具有高速的数据采集能力，可编程逻辑CPLD的采用，使得系统具有较强的可扩展性。
The design method of LED big screen scanning circuit is introduced, and the virtues of programmable logic device application on high-speed digital system are presented.
介绍了LED大屏幕扫描电路的设计方法，阐述了可编程逻辑器件在高速数字系统应用中的优点。
A microprocessor consisting of bit slice operates at such high speed and has such an extremely flexible logic structure that its data width can be easily defined and changed.
用位片器件构成的微处理器速度高，逻辑结构极为灵活，可以十分简便地规定和改变字长。
In order to meet with the requirements of high-speed, the source coupled FET logic (SCFL) is applied in all of the circuits.
为了适应高速度的要求，所有电路全都采用源极耦合场效应管逻辑来实现。
Majority logic decoding is one of the simplest high speed decoding techniques to implement, and can completely be done in parallel. Thus, it is suitable to ultra high speed computer systems.
择多逻辑译码是实现最简单的一种译码方法，具有很高的译码速度且便于并行处理，因此，是一种适合于高速计算机应用的译码技术。
Computer with high speed, accurate and can be designed in accordance with the logic of dealing with problems.
计算机具有运算速度快、正确、可以按照设计逻辑处理提问题等特性。
The speed of Arithmetic Logic Unit must be fast enough to design high performance microprocessors.
微处理器要达到高的速度，算术逻辑部件的速度必须足够快。
The gathering and controlling of high speed data of audio frequency by CPLD and the logic design of interface are introduced for underground water leakage detecting instrument.
介绍了在地下漏水探测仪中用CPLD实现高速音频数据采集控制及与单片机的接口逻辑设计。
Level restoration pass-transistor logic is proposed for low speed cell while dynamic transmission gate logic for high speed cell.
低速单元采用带有电平恢复的传输管逻辑实现，高速单元采用动态传输门逻辑实现。
If don't regard to its effects in high-speed circuit design, the circuit with correct logic function often does not work while debugging.
若在高速电路设计时不考虑其影响，逻辑功能正确的电路在调试时往往会无法正常工作。
The logic and circuit design of a very high speed ECL programmable frequency divider is described.
介绍一种ECL高速程控分频器的逻辑设计、电路设计及研制结果。
In order to avoid clock skew familiar in high-speed sequential logic circuits, buffers are placed in clock-tree.
为了避免高速时序电路中常见的时钟偏差，在时钟树中放置了缓冲器。
Furthermore, in order to avoid clock skew familiar in high-speed sequential logic circuits, negative clock skew system is used in clock routeway and buffers are placed in clock-tree.
此外，为了避免高速时序电路中常见的时钟偏差，时钟通道采用负时钟偏差系统，并在时钟树中放置了缓冲器。
A new high speed integrated logic has been described.
介绍了一种新的高速集成逻辑电路。
The high speed data acquisition system based on FPGA, which is the core logic control module of the system is designed.
设计了以FPGA为核心逻辑控制模块的高速数据采集系统。
PCC is as reliable as programmable logic controller (PLC). It's also able to complete some high speed tasks that PLC can't do.
PCC的硬件继承了PLC的高可靠性，同时具备实现高速任务的能力。
A general introduction was made on effect, control principle and PLC logic control of the loop control system in high speed rod rolling.
介绍了高速线材预精轧机活套控制的基本原理及活套波动现象的形成原因，分析了工艺影响因素及其控制方法。
The product is specifically designed to provide well-regulated supply for low voltage IC applications such as high-speed bus termination and low current 3.3v logic supply.
本产品专门设计用于提供规则电源，主要是为低压ic应用：如高速总线终端和3.3V低电流逻辑电源等供电。
Requirements for high speed network adapter in cluster were analyzed in this thesis. The function logic of the network adapter and PCI interface could be implemented in a single FPGA chip.
文中分析了机群系统中高速通信网卡对PCI接口的要求，采用紧凑设计思想，将网卡的功能逻辑与PCI接口实现在一个FPGA芯片中。
Requirements for high speed network adapter in cluster were analyzed in this thesis. The function logic of the network adapter and PCI interface could be implemented in a single FPGA chip.
文中分析了机群系统中高速通信网卡对PCI接口的要求，采用紧凑设计思想，将网卡的功能逻辑与PCI接口实现在一个FPGA芯片中。
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