All circuits are designed by HDL and can be intergrated in one CPLD or FPGA chip, used in the frame synchronization and timing of digital communications receiver.
全部电路由硬件描述语言实现，可以集成在一片CPLD或FPGA芯片内部，用于数字通信系统接收端的帧同步和定时。
The PMIC design intent is captured as analog schematics and digital HDL.
PMIC的设计目的是获取模拟图表和数字硬件描述语言。
The programmable logic device and ABEL-HDL is used as input tools, which have simple software interface, good reliability and practical value.
该设计采用可编程逻辑器件，ABEL HDL硬件描述语言为输入工具，接口简单，可靠性高，具有一定的实用价值。
With blocking means in CPLD design, the structure of HDL (hardware describe language) program is also given.
采用模块化设计方法对CPLD进行设计，并给出了硬件描述语言的具体结构。
One important characteristic of the EDA is that the design documents should be completed by the HDL. And it was widely used by electronic designer now.
EDA技术的一个重要特征就是使用硬件描述语言(HDL)来完成设计文件，在电子设计领域受到了广泛的接受。
The design of is (Integrated system) is executed on the basis of IP core, with HDL as the main method of systematic function description and by virtue of EDA tools on the computer platform.
集成系统(IS)设计以IP核为基础，以硬件描述语言为系统功能的主要描述手段，借助于以计算机为平台的EDA工具来进行。
The design of is (Integrated system) is executed on the basis of IP core, with HDL as the main method of systematic function description and by virtue of EDA tools on the computer platform.
集成系统(IS)设计以IP核为基础，以硬件描述语言为系统功能的主要描述手段，借助于以计算机为平台的EDA工具来进行。
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