Gaisler has made significant in-roads into European markets and has in-house design facilities for microprocessor, ASIC and field programmable gate array (FPGA) -based designs, Aeroflex officials say.
在微处理器的内部设计、ASIC以及基于现场可编程门阵列(FPGA)的设计等领域，Gaisler公司已经占有了一定的欧洲市场。
Gaisler has made significant in-roads into European markets and has in-house design facilities for microprocessor, ASIC and field programmable gate array (FPGA) -based designs.
Gaisler公司开辟欧洲市场已取得显著成效，并有着成熟的用于微处理器、专用集成电路和基于现场可编程门阵列开发的设计工具。
Based on the working principle, counter structure and Clocked Transmission Gate Adiabatic Logic circuits, a design scheme of decimal counter with reset is proposed.
通过对计数器和钟控传输门绝热逻辑电路工作原理及结构的研究，提出一种带复位功能的低功耗十进制计数器设计方案。
A design scheme to realize the superposition of satellite positioning signal and video signal image based on FPGA (field programmbale gate array) was proposed.
提出一种基于FPGA的实现卫星定位信号与视频图像信号叠加的设计方案。
The design idea and system architecture of costumed fiber channel adapter was proposed based on field programmable gate array.
基于现场可编程门阵列的定制的光纤通道适配器，提出了其设计思路和系统结构。
The design idea and system architecture of costumed fiber channel adapter was proposed based on field programmable gate array(FPGA).
基于现场可编程门阵列（FPGA）的定制的光纤通道适配器，提出了其设计思路和系统结构。
A design project based on Field Programmable Gate Array (FPGA) for multi-channel electronic tablet counter is introduced.
介绍一种基于现场可编程门阵列(FPGA)的多通道电子数片机设计方案。
This paper deals with the design and implementation of Digital Up Conversion and Digital Down Conversion based on the field-programmable gate array (FPGA).
本文主要研究的是基于现场可编程逻辑阵列（FPGA）的数字上下变频技术的设计和实现。
On this basis, a few of principles were given about multilayers PCB design based on Field Programmable Gate Array (FPGA).
在此基础上，给出现场可编程门阵列(FPGA)多层PCB板设计原则。
Based on the analysis of the control demands of the exterior overfall arc water gate, control system buildup, design of the control mode and the realizable control function are put forward.
本文在分析溢流表孔弧形工作闸门控制需满足要求的基础上，提出控制系统组成、控制方式的设计以及可实现的控制功能。
The traditional magnitude comparator is based on gate-level techniques and not suitable for VLSI design.
传统的数字比较器采用门级设计技术，电路结构不规则，不利于大规模集成电路的设计。
The traditional magnitude comparator is based on gate-level techniques and not suitable for VLSI design.
传统的数字比较器采用门级设计技术，电路结构不规则，不利于大规模集成电路的设计。
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