Infrared image enhancement was realized based on FPGA platform in this project.
本文在FPGA平台上实现了红外图像的增强处理。
This system-on-chip of flywheel controller was implemented on an FPGA platform.
在现场可编程门阵列工艺中最终实现了飞轮的片上伺服系统；
The central node and access node of this network are implemented in FPGA platform to set up a 100mbps experimental network, which can support the real-time can bus user data.
在FPGA平台上实现了相应的中心节点与接入节点，搭建了一个百兆速率的实时光纤试验网络。
Finally USES FPGA platform for BIST functions and timing verification, and through design compiler, static timing analysis, automatic placing and routing to achieve a BIST system layout.
最后利用FPGA平台实现了BIST的功能和时序验证，并通过综合、静态时序分析、自动布局布线实现了BIST系统的版图设计。
You then build a final, shippable bitstream which gets burned onto your platform flash, or whatever method your design USES to configure the FPGA.
然后可以构建烧制到平台闪存的最终可发行的比特流，或者构建设计用来配置FPGA的任何方法。
A kind of hardware platform based on PC, MCU and FPGA is given for fingerprint collection, processing and displaying. It has a good performance and easy to be achieved.
针对指纹图像的采集、处理、显示，提出一种性价比好且易于实现的基于PC机、单片机和可编程逻辑器件的硬件平台。
Except for the analogue controlling and bus driving devices, we use FPGA to implement controlling logic in order to provide expansibility of application platform.
在设计上除模拟控制及总线驱动等器件外，尽量采用FPGA来实现控制逻辑以提供应用平台的可扩展性。
To FPGA development platform for the traffic signal system, with a countdown and the buzzer function.
以FPGA为开发平台的交通信号系统，带有倒计时和蜂鸣器功能。
This paper introduces the theory and design method of digital intermediate frequency receiver, and based on high speed DSP and FPGA establish hardware process platform.
介绍了一种数字中频接收机的原理与设计方法，并以高性能DSP、高速fpga为基础，搭建硬件处理平台。
A processing platform is established by integrating DSP with FPGA, the multi-DSP communicates through HPI interface and multi-DSP parallel process is implemented.
该系统由dsp和FPGA相结合构成一种处理平台，多dsp通过HPI接口进行通信，实现了多dsp并行处理。
According to the theory in video compression as well as the simulation and verification requirement in IP core designing, the FPGA based IP core simulation platform is developed.
结合视频压缩的理论以及IP核设计中对于仿真验证的要求，本文设计了视频压缩IP核FPGA仿真验证平台。
Presented software developing tools, developing language and hardware developing platform for FPGA design of CCSDS image compression and AES encryption algorithm.
介绍了实现CCSDS图像压缩算法和AES加密算法的FPGA设计所选择的软件开发工具、开发语言和硬件开发平台。
Secondly, ECNUX platform supports parallel operation, and FPGA has the ability of running in parallel, so the realization of FFT running in parallel is another key problem solved in this paper.
其次，ECNUX平台支持并行操作，并且FPGA也具有并行能力，所以实现并行fft算法是本文解决的另一关键问题。
FPGA functional test platform is composed of configuration circuit, a power circuit and I/O interface circuit.
FPGA功能测试平台由配置电路、电源电路和I/O接口电路构成。
With the flexibility of FPGA, image-processing function can be added to the platform, which is quite useful to schools and research organizations frequently engaged in special image processions.
利用FPGA的灵活性，本平台可灵活的添加图像处理功能，对于一些需要经常进行特殊图像处理的研究型单位(如学校、科研机构等)进行教学、研究具有一定的意义。
Moreover, combined with digital baseband signal processing with FPGA, we could develop various wireless communication systems on a typical hardware platform.
再结合基于FPGA的基带数字信号处理，便可实现在相同的硬件平台上开发不同的无线通信系统。
Finally, the paper gives out a scheme of digitized carrier synchronization loop for software defined radio receiver which is based on the hardware platform composed of FPGA and DSP.
最后给出了一种用FPGA与DSP组成的硬件平台实现软件无线电接收机载波同步环路的方案。
In the current domestic and international study, the core node and the edge node of the OBS experimental platform tend to be implemented by the flexible, low-cost FPGA (field programmable gate array).
在目前国内外的研究中，OBS实验平台的核心节点和边缘节点都倾向使用灵活，低成本的FPGA(现场可编程门阵列)来实现。
Finally, the method is implemented on the platform of FPGA.
最后在FPGA硬件平台上实现了该方法。
Finally, the USB2.0 host controller SoC was implemented and validated on FPGA development platform.
最后，本文利用FPGA开发平台对usb2.0主机控制器片上系统进行了验证。
This paper discusses the design process of a VSPC test platform based on FPGA.
本文详细介绍了基于FPGA实现的视频信号处理芯片验证平台的设计过程。
The new generation digital B-ultrasonography equipment based on embedded ARM9 & FPGA hardware platform and embedded LINUX operating system.
全数字B超诊断仪基于嵌入式ARM9+FPGA硬件平台、LINUX嵌入式操作系统，是一种新型的、操作方便的、技术含量高的机型。
A design of bonder motion control system was proposed based on DSP FPGA, has realized the high speed and high precision control to the movement of line motor in the bonding platform.
提出了一种基于DSPFPGA的键合机运动控制系统设计方案，实现了对键合机平台中直线电机的高速高精运动控制。
Finally, the hardware platform based FPGA is built.
最后利用FPGA实现了系统硬件平台设计。
A reconfigurable processor is designed with the mainstream FPGA as its platform.
以主流FPGA为平台设计了一个可重构处理器。
In this paper, we described the principle and realization of multi function modulation platform on the basis of AD9854 and FPGA.
给出了利用AD 9854与FPGA器件实现多功能调制的原理及实现方法。
A reconfigurable Hardware Platform Based on SOC Design for Digital Protective Relay is presented. It combines the FPGA and the Flash MCU and related interface circuit.
文中提出了基于SOC的可配置微机保护硬件平台的设计方法和具体实现，该平台由FPGA和微处理器以及相关接口构成。
A reconfigurable Hardware Platform Based on SOC Design for Digital Protective Relay is presented. It combines the FPGA and the Flash MCU and related interface circuit.
文中提出了基于SOC的可配置微机保护硬件平台的设计方法和具体实现，该平台由FPGA和微处理器以及相关接口构成。
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