FPGA placement and routing is the most time-consuming stage in chip design. To design faster, smaller size, less delay, and low-power algorithm is a very hot research topic.
布局布线是FPGA芯片设计中最耗时的阶段，能够设计出更加快速、更小面积、时延少、低功耗的算法是学术界研究的热点和趋势。
The VPR is common software for the FPGA placement and routing. It puts forward a comprehensive method of FPGA placement and routing solution. Simulated annealing algorithm is applied to VPR.
广泛应用于学术界研究的VPR软件是一款FPGA布局布线的通用软件，它提出了相对较完整的布局布线方法的解决方案。
The VPR is common software for the FPGA placement and routing. It puts forward a comprehensive method of FPGA placement and routing solution. Simulated annealing algorithm is applied to VPR.
广泛应用于学术界研究的VPR软件是一款FPGA布局布线的通用软件，它提出了相对较完整的布局布线方法的解决方案。
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