According to the character of FPGA, the FIR digital decimation filter is implemented via using distribution algorithms which are based on the technique of looking up table.
根据FPGA芯片的特点，FIR数字抽取滤波器采用分布式算法来实现，这种方法实现的基础是查找表。
In addition the device offers programmable decimation rates and the digital FIR filter can be adjusted if the default characteristics are not appropriate to the application.
此外，该器件提供可编程抽取率，而且如果数字FIR滤波器的默认特征不适合应用要求，还可对其进行调整。
In addition, the device offers programmable decimation rates, and the digital FIR filter can be adjusted if the default characteristics are not appropriate for the application.
此外，该器件提供可编程抽取率，而且如果数字FIR滤波器的默认特征不适合应用要求，还可对其进行调整。
In addition, the device offers programmable decimation rates, and the digital FIR filter can be adjusted if the default characteristics are not appropriate for the application.
此外，该器件提供可编程抽取率，而且如果数字FIR滤波器的默认特征不适合应用要求，还可对其进行调整。
应用推荐