The proposed FFT processor has played an important role in the practical application.
该FFT处理器在实际系统中起到了关键作用。
In the implementation of broadband OFDM system, FFT processor is one of the key components.
在宽带OFDM系统的实现中，FFT处理器是一个关键部分。
Furthermore, single butterfly processing element is employed to control FFT processor scale.
设计方案采用了单个蝶型运算单元以达到控制FFT处理器规模的目的。
It's much easier to implement the scalable FFT processor based on multilevel pipeline processing architecture.
特别是流水线结构使得FFT处理器可以通过对模块级数的控制，很容易的实现不同点数的FFT计算。
At last the FP operation modules are used to design FP FFT processor, achieve high precision of FFT processing on FPGA.
最后应用浮点运算模块设计浮点FFT处理器，在FPGA中实现高精度的FFT处理。
The computing capacity and computing speed of FFT processor has been improved due to the Symmetrical structure of ping-pong RAM.
设计了对称乒乓RAM结构，提高了FFT处理器的连续运算能力和运算速度；
This article introduces the structure of the digital receiver ICS554, and accomplishes the design of FFT processor based on FPGA.
本文介绍了数字接收机ics554的结构，使用其中的FPGA完成频谱分析处理器的设计工作。
FFT algorithm is the most used algorithm for digital signal processing, and a FFT processor is one of the important means for FFT computation.
FFT算法是数字信号处理最常用算法，使用FFT处理器是进行FFT运算的重要手段之一。
FFT is a very important algorithm in digital signal processing, and butterfly operation modules are important construction modules in FFT processor.
FFT是数字信号处理中的一种非常重要的算法，蝶形运算模块是FFT处理其中的重要构造模块。
This paper discusses issues of finite word-length effects in the block floating-point radix-8 FFT processor and presents a novel static model based on statistical analysis.
研究了基于基8算法的块浮点FFT处理器的有限字长效应问题，提出了一种基于理论统计分析的静态模型。
Digital signal processor (DSP) is used to meet the need of digital signal processing technique, such as digital filer and FFT.
数字信号处理器(dsp)是鉴于数字滤波和快速傅立叶变换的数字信号处理技术。
Based on the analysis of the complexity and hardware architecture of FFT, the proposed processor adopts radix-4 DIF algorithm, pipelined architecture and fixed-point operation.
在分析了FFT算法的复杂度和硬件实现结构的基础上，处理器采用了按频率抽取的基- 4算法，分级流水线以及定点运算结构。
This design adopts the algorithm of radix-4 and decimation-in-time (DIT) to devise a real-time FFT hardware processor with practicality.
设计采用基4算法设计了一个具有实用价值的FFT实时硬件处理器。
The FFT phase measuring algorithm is realized on TMS320VC5402 digital signal processor and the flow chart of phase measuring program is introduced.
以TMS320VC5402数字信号处理器实现FFT检相算法，给出检相程序的实现流程。
In order to thoroughly explore the ability of DSP in ARM processor, the high-efficient ARM program of radical 4-fft is designed according to the architecture characters of ARM core.
为了充分挖掘arm处理器数字信号处理能力，结合ARM内核设计特点设计了基4 - FFT算法的高效ARM程序。
In order to thoroughly explore the ability of DSP in ARM processor, the high-efficient ARM program of radical 4-fft is designed according to the architecture characters of ARM core.
为了充分挖掘arm处理器数字信号处理能力，结合ARM内核设计特点设计了基4 - FFT算法的高效ARM程序。
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