The fault-tolerant technology and fault diagnosis technology are studied in detail, and presents the realization method for hardware and software of embedded safety fault-tolerant processor.
对冗余容错技术、故障诊断技术进行了研究，给出了嵌入式安全容错处理器的软硬件实现方法。
The processor's fault tolerant mechanism mainly using temporal redundancy technique was implemented by modifying superscalar processor architecture.
处理器的容错机制是通过修改超标量体系结构，利用时间冗余技术实现的。
The technique of the fault recovery of a multi-processor fault tolerant system MPFTS designed by us is presented in this paper.
本文介绍我们研制的一个多机容错系统MPFTS的故障恢复技术。
This design and implementation of a double modular. fault-tolerant computer sys-tem interfacing to STD-BUS is presented for the industrial process oriented processor withhigh reliability.
本文论述STD 总线双机容错系统的设计与实现，该系统为工矿企业提供高可靠性的处理机模块。
Thus exploring the robustness features of quantum information processing system in presence of various imperfections will be very helpful to design fault-tolerant quantum information processor.
因此分析量子信息处理系统在各种干扰下的演化规律，研究干扰对量子计算鲁棒性的影响，将非常有助于设计高可靠性的容错量子计算系统。
Thus exploring the robustness features of quantum information processing system in presence of various imperfections will be very helpful to design fault-tolerant quantum information processor.
因此分析量子信息处理系统在各种干扰下的演化规律，研究干扰对量子计算鲁棒性的影响，将非常有助于设计高可靠性的容错量子计算系统。
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