This will be the input for the external clock.
这将作为外部时钟的输入端。
The problem of designing computer external clock synchronization system with PCS algorithm is studied.
重点研究了基于统计同步算法的计算机外时钟同步系统的设计问题。
Common always circuit design are two ways, one is internal clock way, another way to external clock way.
常见的始终电路设计有两种方式，一种是内部时钟方式，另一种方式为外部时钟方式。
Physical clock synchronization includes external clock synchronization and internal clock synchronization.
物理时钟同步又包括外同步和内同步。
The problem of designing computer external clock synchronization system with probabilistic algorithm is studied.
该文研究了基于概率同步算法的计算机外时钟同步系统设计。
The external clock frequency applied to the AD7764 determines the sample rate, filter corner frequencies, and output word rate.
AD7764的采样速率、滤波器转折频率和输出字速率由外部时钟频率决定。
An external clock is a common solution but it requires a digital source equipped with clock input, it exists but it is rare and specific.
(增加)外部的时钟是通常的解决方案，但这要求数字源设备具有时钟输入接口。
The idea is to finish a job in a shorter time as measured by an external clock, even if at the cost of more hardware and programming complexity.
其思想是按照外部时钟的步调在更短的时间内完成一项工作，即便要以更复杂的硬件和编程为代价也在所不惜。
To reduce EMI, a frequency synchronization pin allows multiple ICs from the family to self-synchronize or to synchronize to an external clock.
为了减少EMI，一个频率同步的引脚允许此系列的多重IC实现自同步或与外部时钟同步。
Its function is to provide a latching switch action upon sensing an input threshold voltage, with reset accomplished by an external clock signal.
它的功能是当感应到输入电压界限时提供一个锁存开关，通过外部时钟信号完成复位。
The sample rate, filter corner frequencies and output word rate are set by a combination of the external clock frequency and the configuration registers of the AD7763.
采样速率、滤波器转折频率和输出字速率由AD7763的外部时钟频率与配置寄存器共同设置。
The sample rate, filter corner frequencies and output word rate are set by a combination of the external clock frequency and the configuration registers of the AD7762.
采样速率、滤波器转折频率和输出字速率由ad7762的外部时钟频率与配置寄存器共同设置。
The sample rate, filter corner frequencies, and output word rate are set by a combination of the external clock frequency and the configuration registers of the AD7760.
采样速率、滤波器转折频率和输出字速率由ad7760的外部时钟频率与配置寄存器共同设置。
The sample rate, filter corner frequency, settling time, group delay and output word rate will be reduced also, as these are proportional to the external clock frequency.
由于采样速率、滤波器转折频率、建立时间、群延迟和输出字速率与外部时钟频率呈比例变化关系，因此这些参数也会相应降低。
The continuation of biological rhythms in an organism without external cues attests to its having an internal clock.
在没有外部提示的情况下，生物体中生物节律依然能够延续，这能证明它体内有一个时钟。
External devices — For instance, Universal Serial Bus (USB) ports or the system clock.
外部设备——例如，通用串行总线(usb)端口或系统时钟。
It turns out that when our internal clock is ticking faster, we don't just perceive the external world as moving slower - we can actually remember more about it.
原来，当我们的内部时钟节拍加快以后，我们不但感知到外部世界的移动变慢了，我们实际上还可以记住更多的事情。
"This is a very important development, as the nuclei are very well isolated from external perturbations," says Derevianko. It may open a path "toward the ultimate clock."
“这是一个十分重要的进步，因为原子核和外界扰动很好的隔绝开了。”杰列维·扬科说。这开拓了一条“通往终极时钟”的道路。
Our circadian clock, or biological timing system, governs our daily cycles of feeding, activity and sleep, with respect to external dark and light cycles.
我们的生物钟或生物调时系统，对外界黑夜和天明循环的反应，控制着我们每天进食、活动和睡眠的循环。
The effects of multiplicative noise on additive noise-induced internal signal stochastic resonance(ISR)are studied in a Neurospora circadian clock system driven by external signal or not.
利用有和无外信号作用的脉孢菌生物钟体系，研究了与加性噪音相关或不相关的乘性噪音对加性噪音诱导出的内信号随机共振的影响作用。
Additionaly, by using of 16-bit counters and external 2mhz clock signal, the distinguishability of the control Angle is increased.
又因采用外加2m时钟作为计时信号，提高了控制角的分辨率。
Circadian rhythms can be affected to some degree by almost any kind of external time cue, such as the beeping of your alarm clock, the clatter of a garbage truck, or the timing of your meals.
生物钟节律在一定程度上可以受任何外界时间线索影响，如闹钟的声音清洁车的声音及进餐的定时等。
To test for this scenario, rig up an external phase-locked dual-clock source with a knob that intentionally adjusts the phase relationship of the two clocks.
为了测试这个，做一个外部相位锁定的双时钟源，带有两个时钟有意调节相位关系的节点。
Many clock circuits also work with a resistor and capacitor as low-cost timing components or can be driven from an external source.
许多时钟电路也与电阻器和电容器一起使用作为低成本的时间组分或驱动外部输入。
The atomic clock designed according to the method has simple structure and omits a locking circuit of the traditional atomic clock, thereby improving the adaptability for the external environment.
按照上述方法设计的原子钟结构简单，省去了传统原子钟的锁定电路，提高了对外部环境的适应性。
The atomic clock designed according to the method has simple structure and omits a locking circuit of the traditional atomic clock, thereby improving the adaptability for the external environment.
按照上述方法设计的原子钟结构简单，省去了传统原子钟的锁定电路，提高了对外部环境的适应性。
应用推荐