And, of course, we should note that ESL does not necessarily imply a design tool, because some verification applications might fall into the ESL domain.

当然，我们应该注意到ESL并不一定意味着设计工具，因为一些验证应用可能进入ESL领域。

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ESL methodology enables the designers to design, verify and synthesize integrated circuit systems at a higher level of abstraction.

ESL设计方法使得设计者可以在更高抽象层次进行集成电路的设计、验证和综合实现。

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ESL methodology enables the designers to design, verify and synthesize integrated circuit systems at a higher level of abstraction.

ESL设计方法使得设计者可以在更高抽象层次进行集成电路的设计、验证和综合实现。

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