Combining the Constructivism Ideology and taking the case of digital clock design, this paper presents the Application of Constructivism Ideology in Embedded System course teaching.
结合嵌入式系统课程的特点，并以数字时钟的设计为例，介绍了将建构主义教学理论应用于嵌入式系统课程教学。
The composite video, YC component analog video signals such as AD conversion to obtain digital image signals, to extract the synchronization and clock signals. (2) Embedded Systems PCB drawing.
将复合视频、YC分量等模拟视频信号进行AD转换以获取图像的数字信号，同时提取其中的同步和时钟信号。
This thesis has proposed a designing schema of embedded network synchronization clock based on NTP, having done the entire development of hardware and software system.
本论文提出嵌入式ntp网络同步时钟源的设计方案，完成了整个系统的硬件和软件开发。
However, in common embedded system, the real-time clock interrupt will wake up the CPU rapidly and periodically even there is no other devices' interrupt. That will increase system power consumption.
但在一般的嵌入式系统中，当系统进入IDLE状态后，即使没有其他设备中断，实时时钟中断也会不断唤醒CPU，这样就会大大增加系统的功耗。
In order to achieve architectural optimization with acceptable hardware overhead for embedded microprocessor, a novel multi-frequency clock scheme was proposed.
为了在微处理器结构优化的同时保持合理的硬件开销，提出了一种混合频率策略。
In order to achieve architectural optimization with acceptable hardware overhead for embedded microprocessor, a novel multi-frequency clock scheme was proposed.
为了在微处理器结构优化的同时保持合理的硬件开销，提出了一种混合频率策略。
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