This paper presents an encryption engine composed of a single chip processor and a dual port RAM.
本文论述一个由单片机和双端口存储器构成的加密机，阐述了加密机的工作原理和操作流程。
Using IDT70V24 as a example, the concrete apply of dual-port RAM in multi-processor system consisting of DSP and FPGA is explained in detail.
并以IDT70 V 24为例，详细说明了双口ram在由DSP处理器和FPGA构成的多机系统中的具体应用。
PCM stream which has been bit blocked is sent into computer, buffered by a dual port static ram, then it's frame blocked roughly.
首先将接收到的PCM数据流进行位同步，然后经过一双口ram作为缓冲，直接送入微机进行实时帧同步码粗同步。
Considering that the IED requires high reliability and real-time performance, the interrupt manner was adopted of dual-port RAM.
考虑到IED的实时性和可靠性，对双口ram选择了中断工作方式。
The paper introduces a method of simulating dual-port RAM with SRAM by TDMA in the data collecting system composed of an m 51 microprocessor.
介绍了一种在51单片机采集系统中，使用普通SRAM，采用时分复用模似双口ram的方法。
Thus the expensive dual-port RAM can be replaced and the area of PCB reduced. It has been proved in practice that the method is stable and reliable.
使用这种方法，既可以避免使用昂贵的双口ram，又可减少印刷板面积，实践证明，这种方法是稳定可靠的。
With a dual-port RAM, a novel data transmission structure was designed, and ping-pong technique was used to implement the buffering of the high-speed real-time image data.
借助于单片双口RAM，设计了一种新颖的数据传输结构，并利用乒乓技术实现对实时高速图像数据的缓冲。
With a dual-port RAM, a novel data transmission structure was designed, and ping-pong technique was used to implement the buffering of the high-speed real-time image data.
借助于单片双口RAM，设计了一种新颖的数据传输结构，并利用乒乓技术实现对实时高速图像数据的缓冲。
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