DSP and CPU processor are among the product that develops fastest in the electronic industry field, they are applied widely in the field of communication, consumption and multimedia.
DSP和CPU处理器是目前电子工业领域增长最迅速的产品之一，它们被广泛地应用于通信、消费和多媒体等诸多领域。
The DMA controller can transmit data among the interior memorizer, exterior memorizer and chip peripheral without the CPU intervention. It has comprehensive application value in the DSP system.
DMA控制器可以无需CPU介入而在内部存储器、外部存储器和芯片外设之间传送数据，其在DSP系统中有广泛的应用价值。
The paper introduces the CPU structure, Memory composition, Peripheral resources and the addressing modes of DSP.
本文讲述了DSP的CPU结构、存储器构成、外设资源和指令寻址方式等。
On the basis of the present technique in the field of power monitoring system, this paper proposes and develops a kind of electric monitoring instruments with dual cpu-arm kernel and DSP kernel.
本文以电力监测系统领域现阶段的技术为参考，提出并研制了一种基于ARM内核和DSP内核双cpu的电力监测仪。
This paper introduces the design of microcomputer motor protection device based dual CPU structure: DSP and MCS-51 in detail.
本文详细介绍了基于DSP和51单片机的双CPU微机型电动机保护装置的设计。
Then, DSP chip TMS320LF2407 of TI company is chosen as the CPU of control system, and the control system of the automatic sort device is designed.
然后，选择TI公司的DSP芯片TMS320LF2407作为控制系统的中央处理器，进行了自动分捡装置控制系统的设计。
With regards to the hardware design, a DSP chip TMS320F206 is adopted as CPU, and builds a hardware platform of sample, control, communication and human interface.
硬件设计方面采用DSP芯片TMS320F206为核心处理器，建立起基本的采样、控制、通信和人机接口硬件平台。
DSP controller is chose as the system CPU and the attitude control demo experiment is achieved by generalized the incomplete integral PID control algorithm.
采用不完全积分PID控制算法初步实现了姿态控制的演示实验。
DSP in the analog signal is converted into digital signal processing real-time after high-speed dedicated processor, its processing speed than the fastest CPU faster 10 to 50 times.
DSP是在模拟信号变换成数字信号以后进行高速实时处理的专用处理器，其处理速度比最快的CPU还快10 ~50倍。
The thesis construct SOPC system in FPGA based on NIOS soft core CPU to realize the image processing which only could be finished by DSP device.
本文是以Nios软核CPU为核心处理器，在FPGA中构建SOPC，实现原来主要由DSP器件才能完成的图像处理功能。
With a larger raise in the performance of CPU, DSP and FPGA processors, to improve bus performance is the key to enhancing system performance.
随着CPU、DSP和FPGA等处理器的性能得到较大提升，提高连接这些高性能器件的总线性能成为提升系统性能的关键。
With a larger raise in the performance of CPU, DSP and FPGA processors, to improve bus performance is the key to enhancing system performance.
随着CPU、DSP和FPGA等处理器的性能得到较大提升，提高连接这些高性能器件的总线性能成为提升系统性能的关键。
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