The drain voltage has been increased by a factor of four.
漏电压增加了三倍。意即，是原来的四倍。
However, the peak of field plate electronic field will increase with the drain voltage until device is breakdown.
而场板电场峰值则随着漏电压的增大不断增大，直至器件击穿。
This can be explained by two major differences of the 800v drain-source voltage waveform.
这里有两条理由可以解释800伏特漏源极电压波形的两个差异。
As in case of drain-source voltage this method allows to associate the elements of the drain current waveform with its contribution to the whole spectrum.
就象漏源极电压的例子那样，用这种方法也可以找出漏极电流的哪一部分对电磁干扰频谱产生影响。
The 800v quasi resonant design with lower current peak and lower drain-source voltage during turning on of the MOSFET demonstrates advantages in conducted EMI spectra regarding the primary side.
拥有更低峰值电流和场效应晶体管漏源极开通电压的800伏特准谐振设计展示出一次侧传导电磁干扰降低的优势。
The superposition of all these elements results in a typical drain-source voltage shown in Fig. 16.
把这些原理按时序整合呈现出图16所示的典型漏源极电压。
The hard switching approach (as shown in Fig. 26) doesn't consider the minimum drain-source voltage.
硬开关(图26所示)几乎不考虑漏源极电压的最小值。
The spectra of the main elements of the drain-source voltage can be found in Fig. 20.
图20描述了漏源极电压主要原理产生的电磁干扰频谱。
The decrease of the drain-source voltage or bus voltage affects the entire spectrum evenly according to Fourier theory.
降低漏源极直流母线电压影响干扰信号按傅立叶展开式的全部频带。
The drain-source voltage (Fig. 28) starts oscillating at the end of the flyback phase and reaching the minimum of 100V when the MOSFET turns on.
漏源极电压（图28）在反射过程结束后并减小到100伏特时场效应晶体管导通。
The output power and drain current increase as the gate voltage increases.
输出功率和漏电流增加的栅极电压的增加。
With a gate voltage around 2.5v (minimum), output power and drain current increases substantially.
随着周围2.5V的栅极电压(最低)，输出功率和漏电流增加了很多。
The low supply-current drain is independent of the magnitude of the supply voltage.
低电源电流消耗，是对供应电压的大小无关。
The high-voltage capacitor structure comprises a two-step diffusion drain electrode structural layer, an oxide layer and a polycrystalline silicon layer.
高压电容结构包括双重扩散漏极结构层、氧化层及多晶硅层。
The two-step diffusion drain electrode structural layer is used for serving as a lower electrode plate of a high-voltage capacitor.
双重扩散漏极结构层用以作为一高压电容的下电极板。
The measurement has shown that the devices have higher associated gain, higher gate-drain breakdown voltage and lower noise figure.
测试表明，器件具有高增益、高栅-漏击穿及低噪声特性。
The drain current model is simplified by an average capacitance formula and a simple expression of channel average mobility with gate voltage.
采用一个随栅压变化的平均电容公式，并用一个简单的解析表达式来描述沟道平均迁移率随栅压的变化关系。
The drain current model is simplified by an average capacitance formula and a simple expression of channel average mobility with gate voltage.
采用一个随栅压变化的平均电容公式，并用一个简单的解析表达式来描述沟道平均迁移率随栅压的变化关系。
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