Note that in some cases the DMA transfer is cyclic and never "finishes".
请注意，在某些情况下，DMA传送是环状和从不“饰面”。
Next, it performs a DMA transfer to copy in the parameter structure from the PPE.
接下来，执行dma传输以在参数结构内从ppe复制。
For instance, one of the problems with the original code is that it is limited to the size of a DMA transfer.
举例来说，原来代码的一个问题是一次dma传输的大小有限制。
The Cell BE Handbook defines the sequence of channel operations needed to perform a DMA transfer on pages 450-456 (see Resources).
CellBE 手册的第 450 到 456页定义了执行DMA传输所需的信道操作的顺序（请参见 参考资料）。
A fence establishes the constraint that a given DMA transfer only execute after all previous commands using the same tag have completed.
fence建立了这样一个约束：某个给定的dma传输只有在前面的所有使用相同标签的命令全部执行完成之后才会执行。
When the DMA transfer is complete, the spe_arg_t structure passed as an argument by the PPE program has been copied into the SPE program for argument validation.
当DMA传输完成时，由PPE程序作为参数传递的 spe_arg_t结构就会被拷贝到SPE 程序中进行参数验证。
After the transfer, you use the data in that structure to copy the string itself into your buffer in the local store using another DMA transfer, and wait for it to complete.
传输之后，使用那个结构中的数据来将字符串自身复制到本地存储的缓存区内，方法是借助另一个dma传输并等待它完成。
It consists of an 8-bit 6502 CPU (without support for decimal mode, also known as BCD), DMA transfer unit, pseudo audio processing unit, 1/12 clock divider, and a bit of logic for address decoding.
他由一个8位6502CPU（不支持整数模式，也被称为BCD），DMA传输单元，伪音频处理单元，1/12时钟分频器，以及1位逻辑单位的地址译码。
Realize the interface between PCI9054 and the PCI bus, including the bus arbitration, read and write of the registers, the configuration of the EEPROM, the DMA transfer, interrupt response and so on.
实现PCI9054与计算机PCI总线的接口，包括总线仲裁，寄存器读写操作，EEPROM的配置和下载，DMA传输，中断响应等功能。
By mapping multiple SPUs into a single process, it becomes possible to use DMA to transfer data between the local store of two SPUs directly.
通过将多个SPU映射到一个进程中，就可以使用DMA来在两个SPU的本地存储之间直接传输数据。
Queue a DMA PUT to transfer the buffer back to main memory.
对DMA PUT 进行排队，从而将缓冲区传输回主内存。
You use the same DMA parameters as for the last transfer, but this time it is an MFC_PUT_CMD command.
使用相同的dma参数作最后的传输，但这次使用的是MFC_PUT _ CMD命令。
After the data is processed, mfc_put initiates a transfer back into main memory, and the next two functions cause you to wait for DMA completion.
在数据处理完之后，mfc _ put会发起一个传输，传回主存，接下来的两个函数会让您等待dma操作完成。
A direct memory address (DMA) is normally used to transfer information directly between devices, bypassing the CPU.
一个直接的存储器位址(DMA)通常被用在装置之间直接地传递信息，省略处理器。
Flexible setting of interrupt and DMA is adopted in the software design, which improves the efficiency of data transfer and performance of DSP.
在软件设计中，通过灵活设置中断与DMA，不仅提高了图像数据的传输效率，而且充分发挥了DSP的高速性能。
FIFO (first in first out) and DMA are two primary modes for the high-speed data transfer between the data acquisition (DAQ) equipments and PCs.
数据采集设备与PC主机之间的高速数据传输有FIFO(先进先出)和DMA两种主要方式。
The research result shows that the flexible control DMA can not only raise image data transfer efficiency but also improve DSP speed.
实验结果表明，通过灵活地控制DMA，不仅能够提高图像数据的传输效率，而且能够充分地发挥DSP的高速性能。
This paper also introduces the high-speed data transfer and memory by utilizing DMA and ping-pong butter.
对于高速的数据采集与存储，给出了DMA方式的传输与乒乓缓冲机制的实现方法。
The way of data transfer in DMA mode, control method of logical programmable device and design of driver program are discussed to solve the key point of sequential transmission.
给出DMA工作方式下数据传输的设计方法，可编程逻辑器件的控制逻辑和驱动程序设计，解决了数据传输连续性的关键问题。
Because of its separate structure between microprocessor bus and DMA bus, the recorder achieves higher data transfer rate.
由于采用分离的微处理器总线和DMA总线结构，因此实现较高的数据存储速率。
In this scenario, the DMA-based transfer need not shift data later on.
在这种方案中，基于DMA移动就不需要数据移位了。
In addition, an on-chip DMA controller (DMAC) and data transfer controller (DTC) are provided, enabling high-speed data transfer without CPU intervention.
另外，还提供了内置dma控制器(DMAC)和数据传送控制器(DTC)，可实现无cpu干预的高速数据传送。
The ECC controller transmits the data to a direct memory access (DMA) buffer for transfer to the host device, and to an ECC block for error detection and correction of the data.
ECC控制器将数据发送给用于将数 据传送到主机装置的直接存储器存取（DMA）缓冲器以及用于对数据进行错误检测和纠错的ECC块。
The ECC controller transmits the data to a direct memory access (DMA) buffer for transfer to the host device, and to an ECC block for error detection and correction of the data.
ECC控制器将数据发送给用于将数 据传送到主机装置的直接存储器存取（DMA）缓冲器以及用于对数据进行错误检测和纠错的ECC块。
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