Practice shows that it is a practical digital multiplier.
实践表明,这是一种实用的数字乘法器。
This paper presents briefly the digital multiplier with different structure.
本文简要介绍了几种结构的数字乘法器。
The paper proposed a signal equal divided middle sampling analog digital multiplier.
本文提出了一种信号等区间分割、中点采样模拟数字混合乘法器。
DSP adopts Harvard structure in which program memory and data memory are divided. DSP can realize various digital signal process algorithms by special hardware multiplier.
DSP内部采用程序和数据分开的哈佛结构,具有专门的硬件乘法器,可以用来快速地实现各种数字信号处理算法。
DSP technologies have applied in every field of digital signal processing because of its parallel multiplier, pipeline structure and fast On-Chip memory.
数字信号处理(dsp)具有并行的硬件乘法器、流水线结构以及快速的片内存储器等资源,其技术广泛地应用于数字信号处理的各个领域。
The chapter 4 discuss some question of the circuit using programmable device like digital phase locked loop and digital frequency multiplier, it can increase the way of circuit design.
第四章探讨了运用可编程技术设计数字锁相环和数字倍频器的相关问题,为以后电路设计拓展更多的方法。
Multiplier is the key in the Digital Signal Processing System.
法器是数字信号处理系统中的关键。
Multiplier is the key in the Digital Signal Processing System.
乘法器是数字信号处理系统中的关键。
Multiplier is the key in the Digital Signal Processing System.
乘法器是数字信号处理系统中的关键。
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