To shorten the distance between theory and practice, improve the ability of flexible application of digital components, logic circuit design is proposed combination of the fifth step.
为缩短理论与实践的距离，提高灵活应用数字元器件的能力，提出了组合逻辑电路设计的第五步。
The practice shows that this method can save a lot of FPGA resources, which just need over 100 LE logic unit to effectively solve the FIR digital filter design algorithms in FPGA resource issues.
实践表明，此方法可以节省大量的FPGA资源，仅仅需要100多个LE逻辑单元，就可以有效解决FIR数字滤波器算法在FPGA设计中资源紧张的问题。
The practice shows that this method can save a lot of FPGA resources, which just need over 100 LE logic unit to effectively solve the FIR digital filter design algorithms in FPGA resource issues.
实践表明，此方法可以节省大量的FPGA资源，仅仅需要100多个LE逻辑单元，就可以有效解决FIR数字滤波器算法在FPGA设计中资源紧张的问题。
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