The design of CPLD has adopted the output clock of image sensor to write SDRAM.
CPLD电路设计采用图像传感器的输出时钟触发sdram写过程。
This paper introduces an AC servo control system based on the design of CPLD and analogue controller integration.
交流伺服控制系统的组成本文所设计的交流伺服控制系统是用于数控机床上的进给驱动系统。
At last we describe the software design, including software design of CPLD basing on VHDL and software design of DSP.
最后是软件部分的编程，包括CPLD部分的硬件描述语言程序设计，和DSP部分相关的程序设计。
The research focuses on the design of CPLD and other key parts of DTB, which provides interface for DSP of the receiving subsystem.
研究内容还包括为地震接收子系统DSP信号处理器提供接口的CPL D等关键部件的设计。
According to the craft of loom, the paper assigns the CPLD resources, chooses the type of chip and finally completes the design of CPLD extender board circuit.
根据织机工艺原理，将CPLD资源进行分配，并进行芯片选型分析，最后完成CPLD扩展板电路设计。
It presents in the article how to extend the interface of MCU with CPLD device while designing smart instruments, including the logic function design of CPLD and the interfacing program of MCU.
介绍了在智能仪表设计中，使用CPLD器件来扩展单片机功能的方法，包括CPLD逻辑功能的设计和单片机接口程序的编写等内容。
If you use the CPLD method of configuring the FPGA, you can store both the FPGA bitstream and the required code in a single NOR flash chip; it's probably the simplest system design.
如果使用CPLD方法配置FPGA，则可在一个NOR闪存芯片中存储fpga比特流和所需的代码；这可能是最简单的系统设计。
Design of LED Chinese character display system based on CPLD is given.
给出一种基于CPLD的LED汉字显示系统设计方案。
In the third chapter, the principle and the application occasion of Multiplex PWM Generator are introduced, the design method of Multiplex PWM Generator based CPLD is presented in detail.
第三章介绍了多路输出pwm波形发生器的原理和应用场合，详细给出了利用CPLD实现多路输出pwm波形发生器的设计过程。
The gathering and controlling of high speed data of audio frequency by CPLD and the logic design of interface are introduced for underground water leakage detecting instrument.
介绍了在地下漏水探测仪中用CPLD实现高速音频数据采集控制及与单片机的接口逻辑设计。
This paper introduces a design of Direct Digital Frequency Synthesis(DDFS) based on CPLD, and describes clearly the design method of a multi-function waveform generator using DDFS.
本文介绍了一种基于CPLD的直接数字频率合成（DDFS）的实现方法，详细阐述了采用此技术设计多功能信号发生器的方法。
According to the characteristics of 2psk signal, a 2psk demodulator design scheme based on CPLD is suggested.
针对2ps K信号的特点，提出了一种基于CPLD的2ps K信号解调器设计方案。
The applying of CPLD in this logic design simplifies the hardware and saves the system resources.
将CPLD应用到逻辑电路设计中，既简化了硬件电路，又节省了系统资源。
The design of keyboard and display module based on CPLD is introduced in this article.
本文介绍了一种基于CPLD的键盘与显示模块的设计。
We put emphasis upon systemic hardware design, discuss the sequence control of CPLD, Register control of image sensor, and hardware exploiture, software realization, empirical analysis of DSPs, etc.
并着重研究了系统的硬件设计，讨论了CPLD的时序控制、图像传感器的寄存器控制以及DSP芯片的硬件开发、软件实现、实验分析等等。
This paper introduces the design of the interface between TFT-LCD and ARM embedded processor based on CPLD.
介绍了基于CPLD实现的TFT液晶显示屏与ARM嵌入式处理器接口设计方案。
Based on the theory, DDS is realized with CPLD through program and the design of sweep signal generator is finished. And the system will have high price performance ratio.
基于此理论，本文用CPLD通过编程实现DDS，完成了扫频信号发生器的设计，此系统具有很高的性价比。
The design method of common control circuit and CPLD, generic trouble dictionary were mainly introduced.
重点介绍其通用控制电路、CPLD设计及故障字典生成方法。
A novel design of spectrum signal processing system was presented, using TMS320C6713 DSP with CPLD as its key processor.
以TMS320C 6713DSP为核心处理器，用CPLD加以配合，提出了一种新的光谱信息处理系统的设计方案。
This paper illustrates the general design of digital frequency meter based on FPGA/CPLD Technology.
简述了基于FPGA/CPLD技术的数字频率计的总体设计。
The overall design scheme, as well as its principle and characteristics, are presented. With powerful CPLD, the sampling rate and channel number of the system are programmable.
给出了可编程采样系统的整体设计方案，利用CPLD强大的硬件可编程能力实现系统采样频率和采样通道数的可编程设置，介绍了其原理和特点。
Introduce how to design hardware system structure of radar signal echo simulator by using CPLD and DDS.
介绍利用复杂可编程逻辑器件CPLD和直接数字合成专用电路dds，设计雷达信号回波模拟器的硬件系统。
Complex Programmable Logic Device (CPLD) is one of Application Specific Integrated Circuit (ASIC) that has been widely used, especially adapt to design digital system.
复杂可编程逻辑器件(CPLD)是目前应用最为广泛的可编程专用集成电路(ASIC)之一，特别适合于数字系统的设计和开发。
A new design of driving pulse circuit for Infrared Focal Plane Arrays (IRFPA) with CPLD is presented in this paper.
提出了一种红外焦平面器件驱动电路的设计方法。
This paper first discusses the general principles of the logical control design for collection, and then presents its design method based on the CPLD technology.
该文在论述采集逻辑控制设计的一般原则的基础上，提出了基于CPLD技术的设计方法。
Mainly introduced hardware design of the measuring circuit. It included used CPLD to implement the direction circuit and count circuit.
详细叙述了测量电路的硬件设计，主要包括方向识别电路与计数电路的CPLD实现，以及部分程序的设计。
A new design of five phase step motor driver based on CPLD is introduced. The driver can implement the full step and the half step control.
介绍了一种基于CPLD实现五相步进电机的驱动器的设计方案，可实现全步、半步控制。
The specialties of PC104 bus are introduced. A design of multifunctional module based on PC104 bus and CPLD is provided.
介绍了PC 104总线的特点，给出了一种基于PC 104总线及CPLD的多功能模块的设计。
A discussion about two JTAG interfaces convenient to debug, extended Ethernet interface and the design of A/D interface converted from serial IIS by CPLD is carried out.
本文重点讨论了方便调试的两种JT AG接口、扩展的以太网接口和利用CPLD将串行I IS转换成并行总线的A/D接口的设计。
Principle of display driver, build and storage of Chinese character library of the display system, and design of display module of Chinese characters based on CPLD are introduced.
介绍显示驱动原理、显示系统汉字库的建立与存贮及CPLD汉字显示模声的设计方法。
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