Said video camera module and image data buffer module are respectively connected to the multi-screen display wall and computer via the main control module.
所述的摄像模块和图像数据缓存模块通过主控制模块分别与多屏幕拼墙的显示屏幕和计算机通信连接。
The corresponding driver module and buffer module are appended in the route of data flow to avoid data conflict and ensure data integrality.
在数据流的路径上添加了相应的驱动和缓冲模块，避免了冲突，保证了数据的完整性。
Secondly, the hardware structure of the interface module is described in detail, mainly including data latch and buffer circuit, choice circuit of transmission rate, etc.
详细叙述了通讯板接口模块的硬件结构设计，其中，对数据缓冲电路、数据传输速率选择电路、逻辑控制电路等各关键点做了重点介绍；
In the video CODEC module, the design based on ADV7183 was proposed. To improve the data access efficiency, a data structure called ping-pong buffer was presented for the input video data.
视频信号采集模块中，采用ADV7183芯片实现了视频数据的采集输入，设计乒乓缓冲区数据组织结构实现了视频数据的输入和访问，提高了数据访问效率。
When the data was received, the data was stored in receive buffer at first, then the data was marked and managed by the upper module.
接收数据时，将其存入接收缓冲区，并标识数据供上层模块处理。
When the data was received, the data was stored in receive buffer at first, then the data was marked and managed by the upper module.
接收数据时，将其存入接收缓冲区，并标识数据供上层模块处理。
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