• However, this new code now assumes that the starting address is 16-byte aligned, and also that it has enough padding on the end that the next data element in memory is also 16-byte aligned.

    然而,这段新代码假定起始地址是按照16字节对齐的,并且末尾也有足够的填充位,因此内存中下一个数据元素也是16字节对齐的。

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  • The part of a two-part memory address that remains constant and provides a reference point from which the location of a byte of data can be calculated.

    保持恒定的两部分内存地址的一部分并提供一个基准点,从这里可以计算一个字节数据的位置。

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  • Every time a memory location is addressed for program instructions or data, a virtual address is translated into a physical or real memory address.

    每次为程序指令或数据处理内存位置时,都需要将虚拟地址转换成物理(或实际)内存地址。

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  • Along with the shift in hardware away from disk-centric and toward memory - and processor-centric data management, flexible technologies are being developed to address different database workloads.

    除了硬件从以磁盘为中心转移到以内存和处理器为中心的数据管理外,一些用于解决不同数据库工作负载的灵活的技术也在开发中。

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  • In that case, the contents of pointer gonzo - a 4-byte memory address - live in the data segment. The actual string it points to does not, however.

    在这个示例中,指针在数据段中占用了4个字节,但是指针所指向的字符串则不在数据段中。

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  • This request asks for sizeof(data) bytes of data copied from the address in main memory denoted by argp to be copied into the object data.

    这个请求会要求将sizeof(data)字节的数据从 argp所指向的主存地址处拷贝到 data 对象中。

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  • A memory address consists of binary data being output on an appropriate bus which we call the address bus.

    一个存储器地址是由输出到适宜的总线上的二进制数据所组成。这个总线我们称为地址总线。

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  • Port 0 is also the multiplexed low-order address and data bus during access to external program and data memory.

    端口0也是复低位地址和在利用外部程序和数据存储器的数据总线。

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  • It is to say that each operating data stored in internal memory has its only exact address (physical address), composed of two parts: segment address and effective address.

    即每一个存储在内部存储器上的操作数都有唯一确定的地址(物理地址),这个地址由两部分构成:段地址和段内偏移地址。

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  • It fetches instructions from memory, supplying the address and control signals needed by memory to access its data.

    它从存储器中取指令,提供存储器需要的地址和控制信号。

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  • Analyzing principle of fault detection in main memory based on characteristic matrix, the paper introduces the condition and methods of detecting address bit and data bit.

    在分析基于特征矩阵的主存故障检测方法原理的基础上,介绍了检测地址位及数据位故障时特征矩阵存在的条件及其确定方法。

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  • The next time the CPU reads the same address, the data is transferred from the cache memory instead of from main memory.

    当CPU下次读取相同地址时,数据将从高度缓存中而不是主存储器中传出。

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  • To a micro-controller, the PDIUSBD12 appears as a memory device 8-bit data bus and 1 address bit (occupying 2 locations).

    对微控制器而言,PDIUSBD12看起来就像一个带8位数据总线和一个地址位(占用两个位置)的存储器件。

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  • The address bus specifies the memory locations (addresses) for the data transfers.

    地址总线为数据传输指明内存位置(地址)。

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  • Locates the address of the function in memory and pushes its arguments onto the stack, marshaling data as required.

    查找函数在内存中的地址并将其参数推到堆栈上,以封送所需的数据。

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  • Memory mapping is used to map image and data files into a processes address space. In memory mapping, the contents of a file are linked directly into the virtual address space of a process.

    内存映射被用于将映像和数据文件映射到一个进程的虚拟地址空间中,也就是将文件内容直接地连接到虚地址中。

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  • The memory system of dual channel A/D automatic acquisition is studied in this paper. Using transceivers and gating controllers, the data bus and address bus of RAM are respectively controlled.

    本文研究了双通道A/D自动采集存储系统,利用数据收发器及数据选通控制器分别控制RAM的数据线及地址控制线。

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  • The memory system of dual channel A/D automatic acquisition is studied in this paper. Using transceivers and gating controllers, the data bus and address bus of RAM are respectively controlled.

    本文研究了双通道A/D自动采集存储系统,利用数据收发器及数据选通控制器分别控制RAM的数据线及地址控制线。

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