The circuit is of judgement intelligence, and can be made of high - precision controller if the decoding display device, ADC and DAC circuits ate added.
该逻辑电路具有判断智能，若配置译码显示器、ADC和DAC电路，就能构成高精度的控制器。
In this paper, a testing standard for the static properties of ADC and DAC and its measuring technology are introduced.
本文介绍了我国adc、DAC静态特性国家测量标准装置和它的测量技术。
Microphone jacks and built-in speakers are devices connected to an ADC and DAC, respectively for the input and output of audio.
话筒与内置扬声器分别是与adc和DAC相连的音频输入与输出设备。
However with a PCP mutex, both the ADC and DAC mutex will have a ceiling priority equal to the SI's task priority.
然而，如果使用的是PCP互斥锁，ADC和DAC都有一个天花板值，都等于认证任务的优先级。
Software radio (SR) aims to place the wideband ADC and DAC close to the antenna and use software to realize all the functions of radio based on an opening, universal and modular hardware platform.
软件无线电的思想是尽可能把宽带adc和DAC靠近天线，将无线电的各种功能用尽可能多的软件在一个开放性、通用性、模块化的硬件平台上完成。
In this paper, a method of designing a vibration simulator based on FPGA, ADC and high-speed DAC is discussed. Hardware block diagram and main FPGA design for this simulator are introduced.
介绍了一种基于FPGA、ADC和高速DAC的振动模拟器的设计方法，并给出了该模拟器的硬件原理框图和FPGA设计的核心模块。
An ADC designed in accordance with the techniques described herein utilizes a quantizer that has a lower resolution than a digital-to-analog converter (DAC) used for negative feedback.
根据在此所述的技术设计的ADC采用分辨率比用于负反馈的数模转换器(DAC)低的量化器。
Circuit section is composed of the ADC module, DAC module, rotation speed signal receiver module, relay module, power module, RS232 communication module and CAN communication module.
电路部分包含ADC模块、DAC模块、转速脉冲信号接收模块、继电器模块、电源模块、RS232通信模块和CAN通信模块。
The effect of each correction bit trial is to allow the ADC to reduce the DAC error if a large noise event (of either sign) has caused a wrong decision to be made on a previous bit trial.
每个校正位试验的作用是如果(具有任何符号的)大噪声事件已对在前位试验做出了错误的判定，则使得ADC减少DAC误差。
The review focused on the characteristics of various converters, principles and the applications of ADC and DAC.
本文介绍了超高压力磨料水射流切割机的工作原理、特性和用途。
Due to the attribute of high-speed transmission of PCI, a PCI-bus-based data acquisition board with multiple ADC&DAC Channels can meet the requirement of data transmission under high-speed conversion.
利用PCI总线的高速传输特性，设计基于PCI总线的多路A/D、D/A转换信号采集卡，可以满足高速转换下的数据传输要求。
Furthermore, this ADC architecture is optimized by converting the most significant bit to analog domain. This method can reduce the precision requirement of the extra DAC to 2~3 bits.
进一步，文章对该结构进行优化，通过把补偿信号的高比特位的值转换到模拟域，将引入的DAC精度降低到2~3个比特，从而进一步降低了该结构的设计复杂度和功耗。
Furthermore, this ADC architecture is optimized by converting the most significant bit to analog domain. This method can reduce the precision requirement of the extra DAC to 2~3 bits.
进一步，文章对该结构进行优化，通过把补偿信号的高比特位的值转换到模拟域，将引入的DAC精度降低到2~3个比特，从而进一步降低了该结构的设计复杂度和功耗。
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