Rough cutting cycle instruction G71 is one of the commonly used instructions in manual Program of NC lathes.
数控车床内、外径粗车循环g71是数控车床手工编程中最常用的指令之一。
In those days, working with computers meant writing code to save a byte here and an instruction cycle there.
在那些日子里，使用电脑意味着编写代码保存一个字节在这里，一个指令周期后又再取出来放到那里。
The POWER6 chip has two hardware instruction threads that are both capable of issuing multiple instructions per cycle, which causes a boost in performance.
POWER 6处理器有两个能够在每个处理器周期发出多条指令的硬件指令线程，从而改善了性能。
The POWER5 chip has two hardware instruction threads that are both capable of issuing multiple instructions per cycle, which causes a boost in performance.
POWER 5芯片有两个硬件指令线程，在每个周期都能够执行多个指令，这可以提高性能。
Stall -- A clock cycle where the processor does not begin a new instruction.
暂停（Stall） ——处理器不开始执行新指令处的时钟周期。
Instruction 4 can be issued in the clock cycle immediately after instruction 3 because it does not require the result of instruction 3 to execute. You can visualize it like this.
指令4可以在指令3之后紧接的那个时钟周期执行，因为它不需要指令3的结果来执行。
By knowing instruction retired per cycle, the system knows how fast the current application is executing inside the processor.
通过知晓每循环的指令重试，系统就知晓了处理器内部正在执行的当前应用程序有多快。
In other words, SOFTWARE interrupts always occur at the beginning of an instruction execution cycle.
换句话说，软件中断常常在指令运行周期的开始发生。
At per cycle, processor fetch many instruction from many thread to manage operation.
在每个周期，处理机从多个线程取出多条指令调度执行。
This article gives a detail discussion on the assembled code optimization from instruction arrangement, register division, condition selection branch and cycle structure based on the core of ARM9TDMI.
本文基于ARM 9tdmi内核，从指令调整、寄存器分配、条件分支和循环结构等方面对汇编代码的优化方法进行了详细的论述。
Simultaneous Multithreaded Processors improve the instruction throughput by allowing fetching and executing instructions from several running threads simultaneously in each clock cycle.
同时多线程处理器在每时钟周期从多个线程读取指令执行，极大地提高了指令吞吐率。
At the beginning of an instruction execution cycle.
指令运行周期的开始发生。
In an SISD architecture there is a single instruction cycle; operands are fetched serially into a single processing unit before execution.
在单指令流单数据流结构中，有单一的指令周期，在执行前，单个处理机按序取操作数。
The instruction cycle is the procedure a microprocessor goes through to process an instruction.
指令周期是微处理器通过对指令进行处理的过程。
The first mission of the dissertation is to design NDSP25 processor, which is fully compatible with the TI TMS320C25 DSP processor in instruction set and cycle timing.
本论文研究的前期任务是，以德州仪器TMS320C25数字信号处理器为目标，研制指令与时序完全与之兼容的数字信号处理器芯片核NDSP25。
It is more efficient to design a simple instruction set that enable the execution of one instruction per clock cycle.
设计一个能够在一个时钟周期执行一条指令的简单指令系统才是更有效的。
The basic operating cycle of a processor during which a single instruction is fetched, interpreted, and executed.
基本操作周期的处理器在一个单独的指令是拿来，解释和执行。
In Chapter 2, we learned that the processor fetches and executes a single instruction during each machine cycle.
在第二章中，读者知道了在每个机器周期内处理器取出并执行一条指令。
In the field of education, teaching knowledge management is becoming the key subject in the management of classroom instruction, especially in the research of dynamic cycle.
在教育领域中，教学知识管理逐渐成为课堂教学管理尤其是有效教学研究的重要课题。
Another unique architectural feature is the memory system which allows an instruction fetch and at the same time a data access by each individual core at every single clock cycle.
另一个独特的构架特性是内存系统，它允许一个取指，并在同一时间，每一个核可以读取数据在每一个单独的时钟周期内。
Another unique architectural feature is the memory system which allows an instruction fetch and at the same time a data access by each individual core at every single clock cycle.
另一个独特的构架特性是内存系统，它允许一个取指，并在同一时间，每一个核可以读取数据在每一个单独的时钟周期内。
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