In the paper, we also design a detailed implementation program for each module and achieve that with FPGA to verify the correction of the function and timing.

论文中对每个块都设计了详细的实现方案，并用FPGA进行了实现，验证了模块功能和时序的确性。

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In the paper, we also design a detailed implementation program for each module and achieve that with FPGA to verify the correction of the function and timing.

论文中对每个块都设计了详细的实现方案，并用FPGA进行了实现，验证了模块功能和时序的确性。

youdao