• Simulations have been done through adjusting parameters such as input signal amplitude, feedback gain, amplifier gain, comparator gain and the position of the phase compensator.

    改变输入信号幅度反馈增益系数、放大器增益、比较增益参数以及相位补偿器位置进行了仿真

    youdao

  • This paper describes a new method, Doppler heterodyne measurement method of surface profile, using a simultaneous phase comparator.

    本文提出新的方法多普勒外差测量表面面,并首次提出和制作同步相位

    youdao

  • The digital comparator designed with FPGA generates several PWM current waveform synchronously, to realize the step angles even division control for four-phase stepping motor.

    通过FPGA设计数字比较器同步产生路PWM电流波形实现对四相步进电动机转角进行均匀细分控制

    youdao

  • A phase comparator compares the phase of the reference clock with that of the output clock and outputs a phase comparison signal.

    相位比较器比较基准时钟输出时钟相位,输出相位比较信号

    youdao

  • The paper introduces a kind of clock recovery system based on phase-locked loop with bi-directly incident phase-comparator.

    介绍一类基于双向输入型相器锁相技术时钟恢复系统

    youdao

  • The theory to extract angular error is described and the realization of millimeter radar's digital phase comparator and extracting method of angular error's sign are discussed.

    论述了如何利用三通道维距离像获取图像的实现方法

    youdao

  • The present invention comprises a phase and frequency comparator and a comparing module.

    频率比较包括相位-频率检测器以及一比较模块

    youdao

  • The magnitude comparator designed with FPGA generates several PWM current waveform synchronously, to realize the step angles even division control for four-phase stepping motor.

    并通过FPGA设计的数字比较同步产生路PWM电流波形实现对四相步进电动机转角进行均匀细分控制

    youdao

  • The measure sub-element , the phase-comparator , and the power level are introduced.

    检测环节、鉴相功率做了介绍;

    youdao

  • The key circuit design includes a sample-and-hold gain circuit using switched-capacitor to sample or hold the signal and a preamplifier-latch comparator using two-phase clock.

    电路设计中主要包括开关电容采样的全差分运放组成的采保增益电路两相时钟控制带预放大器的锁存比较器。

    youdao

  • The key circuit design includes a sample-and-hold gain circuit using switched-capacitor to sample or hold the signal and a preamplifier-latch comparator using two-phase clock.

    电路设计中主要包括开关电容采样的全差分运放组成的采保增益电路两相时钟控制带预放大器的锁存比较器。

    youdao

$firstVoiceSent
- 来自原声例句
小调查
请问您想要如何调整此模块?

感谢您的反馈,我们会尽快进行适当修改!
进来说说原因吧 确定
小调查
请问您想要如何调整此模块?

感谢您的反馈,我们会尽快进行适当修改!
进来说说原因吧 确定