Then, a new method testing the double fault of combinational circuits based upon Boolean partial derivative is proposed.
在此基础上提出了基于布尔偏导数的组合电路双故障检测的新方法。
The paper proposes a mew method for testing combinational digital circuit which is based on the VHDL language.
本文提出了一种新的基于VHDL语言的组合数字电路测试码自动生成方法。
A special testing sequence input is need for measuring maximum dyna - mic current of a combinational logic circuit.
组合逻辑电路的最大动态电流测试应在电路的原始输入端施加一个特定的测试序列才能实现。
The properties of Boolean difference are made use of to derive a new method for fault testing in combinational logic circuits. This method is simpler and different from the traditional one.
本文利用布尔差分的性质，给出了一种不同于传统的求组合逻辑线路故障测试码的新方法，对故障测试有一定的简化作用。
The properties of Boolean difference are made use of to derive a new method for fault testing in combinational logic circuits. This method is simpler and different from the traditional one.
本文利用布尔差分的性质，给出了一种不同于传统的求组合逻辑线路故障测试码的新方法，对故障测试有一定的简化作用。
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